[PATCH] Test for multi-bit error correction

[Iwo Mergler]

On Tue, 4 Sep 2012 01:25:18 +1000
Artem Bityutskiy <dedekind1 at gmail.com> wrote:
>
> So basically you test that ECC works, and you are trying to be
> independent on the NAND HW and the ECC type. Right?
> 
> How about mtd_nandecc test? How is it different? Do we need 2 tests?
> Why?
> 

Akinobu already said it - mtd_nandecc tests the implementation for
software ECC, while mtd_nandbiterrs pokes holes into real NAND
FLASH pages until the ECC (software or hardware) falls over.

It's a test for the NAND driver, rather than the ECC implementation.
The pattern I'm using is not sufficient to guarantee that all possible
error constellations are caught. There is not enough endurance
in the FLASH or indeed time in the universe to do that. :-)

But it will tell you how many '1'->'0' bit errors it could introduce into
every subpage full of random data, before the whole page comes
back as uncorrectable.

In a nutshell, I got fed up by having to fix yet another vendor-supplied
NAND driver which claimed to support BCH8 hardware ECC but in
reality considered a single bit error as 'uncorrectable'.

So I submitted my test code in the hope that NAND driver authors
can use it to validate the ECC handling.


Best regards,

Iwo

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