[RFC][PATCH] bcm47xxnflash: use small delay between polling

Kevin Cernekee cernekee at gmail.com
Fri Nov 23 11:38:03 EST 2012

On Fri, Nov 23, 2012 at 9:43 AM, Rafał Miłecki <zajec5 at gmail.com> wrote:
> ---
> I think it's a good idea to add some delays between polling the
> hardware. I'm not sure however what delays should be used.
> In the proposed patch I put "ndelay(1)" which is extermely low delay,
> but even with that it's common for the loop to make only 0-3 iterations.
> For that reason I don't want to put delays like "ndelay(10)" or bigger.
> This could mean waiting 10ns while the hardware is ready after 1ns.
> What do you think about this?

You might want to run a few tests to see how much time the register
access itself takes.  I don't know about this platform specifically,
but it is not uncommon to see times in the range of 0.5us ~ 1us.  So a
1ns or 10ns delay might not even be noticeable.

1ns is one cycle on a 1 GHz processor; peripherals (and even RAM) are
usually much much slower than that.

A quick and dirty way to measure register access time is to run, say,
10 million reads, and time the loop with a stopwatch.

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