state of support for "external ECC hardware"

[Ricard Wanderlof]

On Tue, 20 Nov 2012, Calvin Johnson wrote:

> I thought of sharing my recent experience with MLC NAND which requires
> 24-bit ECC.
> ...

Thanks for sharing your experiences.

> From various articles in the internet, it seems that NAND flashes are
> going to get more denser and the bit flips are going to increase.
> Hence the H/W ECC controllers are going to have more demand. The S/W
> BCH algorithm available in Linux will consume plenty of cycles which
> can be offloaded to the H/W ECC controller.

That is certainly the case for the newer and larger flashes. However, in 
the past year or so it seems that manufacturers have appeared which are 
offering "small" (i.e. 1 Gb and thereabouts) flashes with 1 bit ECC 
requirements, and are planning to do so for a number of years.

It seems that while the big manufacturers (Micron, Samsung, etc) are 
moving on to state-of-the-art higher densities, there is still a market 
interest for smaller, more reliable flashes, I would think mostly for code 
storage for embedded systems.

/Ricard
-- 
Ricard Wolf Wanderlöf                           ricardw(at)axis.com
Axis Communications AB, Lund, Sweden            www.axis.com
Phone +46 46 272 2016                           Fax +46 46 13 61 30