[RFC] Change ECC algorithm from userspace
Javier Martinez Canillas
martinez.javier at gmail.com
Fri Oct 28 07:21:07 EDT 2011
On Fri, Oct 28, 2011 at 1:13 PM, Angus CLARK <angus.clark at st.com> wrote:
> Hi Javier, Atlant,
>
Hi Angus,
> NAND Flash, coupled with an appropriate ECC scheme, is every bit (excuse the
> pun!) reliable as NOR Flash (which typically does not employ any ECC).
>
> Many of the current SLC devices that recommend 4-bit ECC, also guarantee block
> zero to be good with 1-bit ECC, allowing the part to be used with existing 1-bit
> Hamming ECC boot-loaders. However, this is only valid if your boot-code can fit
> into 1 block.
>
Yes, in fact the NAND that we are using guarantee that the first block
can be reliable with 1-bit ECC if it written less than an threshold
value.
That is why I think we can use this NAND for boot.
> We also faced a similar issue in the past, requiring different ECC schemes for
> the boot code and for the remainder of the Flash. Our approach was based on MTD
> partitions - each partition could have different ECC scheme, with the respective
> 'nand_ecc_ctrl' structures swapped in and out as necessary.
>
What is wasn't clear for me was if I could do it from user-space or if
I had to modify the OMAP NAND driver to switch the layouts and and ECC
scheme for each partition.
> However, as suggested by others, computing the ECC in software, and using raw
> programming is much simpler!
>
> Cheers,
Yes, I think we should also use that approach. It seems simpler and
less intrusive than changing the driver.
Thanks a lot to everyone for the help!
Best regards,
--
Javier Martínez Canillas
(+34) 682 39 81 69
Barcelona, Spain
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