ubifs not working with 3.1 kernel and MT29F2G08ABAEAWP NAND Flash.

Kumar, Goutam goutam.kumar at ti.com
Thu Oct 20 02:47:07 EDT 2011


Hi Ivan,

Thanks for the input. Can you share the patches, which I can apply and test.

Regards,
Goutam

-----Original Message-----
From: Ivan Djelic [mailto:ivan.djelic at parrot.com] 
Sent: Wednesday, October 19, 2011 9:19 PM
To: Angus CLARK
Cc: Kumar, Goutam; linux-mtd at lists.infradead.org
Subject: Re: ubifs not working with 3.1 kernel and MT29F2G08ABAEAWP NAND Flash.

On Wed, Oct 19, 2011 at 04:25:16PM +0100, Angus CLARK wrote:
> Hi Goutam,
> 
> On 10/19/2011 03:28 PM, Kumar, Goutam wrote:
> > 
> > There is MT29F2G08ABAEAWP (256MB, 8-bit) NAND device on TI EVM.
> > 
> 
> This particular NAND device requires 4-bit ECC.  As far as I can tell, you are
> using the OMAP2 driver with 1-bit Hamming H/W ECC.  This will throw
> uncorrectable ECC errors (as seen in your log) if there are 2 bit flips in any
> ECC block.  The problem gets worse if there are 3 or 4 bit flips, which is still
> within spec of the NAND device.
> 
> This may, or may not, be the source of your problem, but it might be worth
> taking a look anyway.
> 
> The device does include a 4-bit on-die ECC engine, which can be enabled using
> the 'SET_FEATURE' command.  I don't believe this is available in nand_base.c at
> present, but it is not too hard to add.  You would also need to disable the
> OMAP2 H/W ECC support to avoid any layout clashes in the OOB area.  Of course,
> whatever changes you make to the kernel, would also have to be made to u-boot.

If your SoC (AM335x) has the same NAND ECC features as the OMAP36xx
(BCH 4/8 bits), then you can also use it to correct NAND errors, up to 8 bit
per 512 bytes; which is better (and safer) than what the manufacturer
recommends.
I have a patch supporting this with the BCH library on 2.6.35 if you're
interested. Not for 3.1 yet, as I'm waiting for a repost of omap2 driver
patches from TI guys on the mtd list to submit my own patch.

BR,
--
Ivan



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