UBIFS recovery fails

Atlant Schmidt aschmidt at dekaresearch.com
Wed Oct 19 09:30:28 EDT 2011


Ricard:

  One mechanism is that newer flashes simply store fewer
  electrons on the floating gate so a very few electrons
  one way or the other now makes a bigger difference.

  I read an article from Siemens/Infineon a few years ago
  that was explaining how at the then-upcoming design node,
  the difference between a "1" and "0" was going to be less
  than 100 electrons!

  At those levels, there's not a lot of room for error
  in the deposited charge!

                               Atlant

-----Original Message-----
From: linux-mtd-bounces at lists.infradead.org [mailto:linux-mtd-bounces at lists.infradead.org] On Behalf Of Ricard Wanderlof
Sent: Wednesday, October 19, 2011 08:52
To: Atlant Schmidt
Cc: 'Ivan Djelic'; linux-mtd at lists.infradead.org; Ricard Wanderlöf; Jean-Sébastien Gagnon
Subject: RE: UBIFS recovery fails


On Wed, 19 Oct 2011, Atlant Schmidt wrote:

> All:
>
>> On modern SLCs (at least I first saw it on 34 nm SLC flash), those bitflips
>> can be _unstable_, i.e. they can appear and disappear randomly as you read
>> pages. I experienced this phenomenon only on pages which were being programmed
>> or erased during a power cut.
>
>  This makes perfectly good sense. During erasing or programming,
>  charge is being deposited-upon or removed from the floating gates
>  and that's not an instantaneous process, so it can be interrupted
>  while on-going, leaving a gate that's only half charged or half
>  discharged.
>
>  At that point, the floating gate may have charge on it that's
>  all-too-near the threshold voltage for the cell and any given
>  read of that cell could "go either way" depending on minute
>  variations in other conditions.

That makes sense, but it doesn't explain why the effect is appearently
more pronounced on newer flashes than on older ones.

Of course, it could be that there is some other mechanism that also has
had to be changed with shrinking geometries, such as for example (note:
wildly speculating here) that the charge/discharge time for the individual
bit cells is longer on modern flashes for whatever reason, causing them to
be more sensitive to power cuts, as the programming operation (per bit)
takes place over a longer time.

/Ricard
--
Ricard Wolf Wanderlöf                           ricardw(at)axis.com
Axis Communications AB, Lund, Sweden            www.axis.com
Phone +46 46 272 2016                           Fax +46 46 13 61 30

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/


 Click https://www.mailcontrol.com/sr/Ymlp8zmNZXXTndxI!oX7Ul+sZxelw3DREV2PuRGYiNNRbPV17wAWqXkuNhUQVZCj21OCp49t+CbC8dmstCo9uQ==  to report this email as spam.

This e-mail and the information, including any attachments, it contains are intended to be a confidential communication only to the person or entity to whom it is addressed and may contain information that is privileged. If the reader of this message is not the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please immediately notify the sender and destroy the original message.

Thank you.

Please consider the environment before printing this email.



More information about the linux-mtd mailing list