Bug in MTD NAND ONFI chipsize detection

[Nitin Garg]

Why isn't my patch going through? re-sending again,

Signed-off-by: Nitin Garg <nitingarg98 at xxxxxxxx>
---
 drivers/mtd/nand/nand_base.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c54a4cb..cdf6015 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2892,7 +2892,7 @@ static int nand_flash_detect_onfi(struct
mtd_info *mtd, struct nand_chip *chip,
 	mtd->writesize = le32_to_cpu(p->byte_per_page);
 	mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
 	mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
-	chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
+	chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) *
le32_to_cpu(p->lun_count) * mtd->erasesize;
 	busw = 0;
 	if (le16_to_cpu(p->features) & 1)
 		busw = NAND_BUSWIDTH_16;
-- 
1.5.5.6



On Thu, May 12, 2011 at 2:05 AM, Nitin Garg <nitingarg98 at gmail.com> wrote:
> Here is the tested patch, pls apply.
>
> From 1a73f1c3d066a491d0c806883788ab9abdc736f3 Mon Sep 17 00:00:00 2001
> From: Nitin Garg <nitingarg98 at gmail.com>
> Date: Thu, 12 May 2011 01:31:53 -0500
> Subject: [PATCH] Fix ONFI NAND flash size detection by using number of
> Logical Units in device
>
> Signed-off-by: Nitin Garg <nitingarg98 at gmail.com>
> ---
>  drivers/mtd/nand/nand_base.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index c54a4cb..cdf6015 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -2892,7 +2892,7 @@ static int nand_flash_detect_onfi(struct
> mtd_info *mtd, struct nand_chip *chip,
>        mtd->writesize = le32_to_cpu(p->byte_per_page);
>        mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
>        mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
> -       chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) *
> mtd->erasesize;
> +       chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) *
> le32_to_cpu(p->lun_count) * mtd->erasesize;
>        busw = 0;
>        if (le16_to_cpu(p->features) & 1)
>                busw = NAND_BUSWIDTH_16;
> --
> 1.5.5.6
>