[PATCH V3 2/6] dmaengine: add interrupt check for GPMI controller

[Huang Shijie]

The GPMI may have many DMA channels, such as the imx23 has
four DMA channels. All these DMA channels share the same interrupt.
Add the interrupt check for the GPMI, only the first DMA channel will
register the irq.

Signed-off-by: Huang Shijie <b32955 at freescale.com>
---
 drivers/dma/mxs-dma.c |   36 ++++++++++++++++++++++++++++++++----
 1 files changed, 32 insertions(+), 4 deletions(-)

diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index 88aad4f..db36bf1 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -26,6 +26,8 @@
 #include <asm/irq.h>
 #include <mach/mxs.h>
 #include <mach/dma.h>
+#include <mach/mx23.h>
+#include <mach/mx28.h>
 #include <mach/common.h>
 
 /*
@@ -306,6 +308,30 @@ static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
+/* The GPMI has several DMA channels, only the first can register the irq. */
+static bool irq_check(struct mxs_dma_chan *mxs_chan)
+{
+	int irq_num = mxs_chan->chan_irq;
+
+#ifdef CONFIG_SOC_IMX23
+	if (cpu_is_mx23() && irq_num == MX23_INT_GPMI_DMA) {
+		if (mxs_chan->chan.chan_id == MX23_DMA_GPMI0)
+			return true;
+		else
+			return false;
+	}
+#endif
+#ifdef CONFIG_SOC_IMX28
+	if (cpu_is_mx28() && irq_num == MX28_INT_GPMI_DMA) {
+		if (mxs_chan->chan.chan_id == MX28_DMA_GPMI0)
+			return true;
+		else
+			return false;
+	}
+#endif
+	return true;
+}
+
 static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
 {
 	struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
@@ -327,10 +353,12 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
 
 	memset(mxs_chan->ccw, 0, PAGE_SIZE);
 
-	ret = request_irq(mxs_chan->chan_irq, mxs_dma_int_handler,
-				0, "mxs-dma", mxs_dma);
-	if (ret)
-		goto err_irq;
+	if (irq_check(mxs_chan)) {
+		ret = request_irq(mxs_chan->chan_irq, mxs_dma_int_handler,
+					0, "mxs-dma", mxs_dma);
+		if (ret)
+			goto err_irq;
+	}
 
 	ret = clk_enable(mxs_dma->clk);
 	if (ret)
-- 
1.7.0.4