New NAND flash die rev recommends 4 bit ECC

[twebb]

> I just got a notice from Micron that they are making changes to the
> 29F2G08/16 (2 Gbit SLC device). For instance, the 29F2G0816AAD is going
> EOL this month and is being replaced by the MT29F2G08ABAEA. The problem
> is that the new data sheet is recommending 4 bit per 526 byte ECC
> instead of 1 bit per 526 byte ECC. As far as I can tell, the processor
> we are using (AT91SAM9G20) only does 1 bit HW ECC and the software ECC
> code for MTD is also 1 bit. The new NAND Flash die does have a HW 4 bit
> ECC engine added in, which probably would need to have code written to
> support it in order to be able to use it.
>
> So, is anyone working on a 4 bit software ECC code or code modifications
> to utilize the on chip HW ECC engine?
>
> Right now we can use a part from an alternate vendor or do a lifetime
> buy, but I am wondering if this is a trend as die size shrinks and other
> vendors will soon require higher level ECC as well.

Yes, I believe this is a trend.

Since the new part has on-board ECC, can you just configure your NAND
controller to NOT use ECC?  Then, in theory, it's business as usual
but you just won't ever get any correctable or uncorrectable bit
errors when you read the flash because the on-board ECC will handle
it.

twebb