[PATCH v9 1/3] MTD : add the common code for GPMI-NAND controller driver
Marek Vasut
marek.vasut at gmail.com
Sat Aug 20 07:43:20 EDT 2011
On Wednesday, August 17, 2011 01:50:26 PM Huang Shijie wrote:
> These files contain the common code for the GPMI-NAND driver.
>
> Signed-off-by: Huang Shijie <b32955 at freescale.com>
> ---
> drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 1804
> ++++++++++++++++++++++++++++++++ drivers/mtd/nand/gpmi-nand/gpmi-nand.h |
> 377 +++++++
> 2 files changed, 2181 insertions(+), 0 deletions(-)
> create mode 100644 drivers/mtd/nand/gpmi-nand/gpmi-nand.c
> create mode 100644 drivers/mtd/nand/gpmi-nand/gpmi-nand.h
>
> diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
> b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c new file mode 100644
> index 0000000..afeef48
> --- /dev/null
> +++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
> @@ -0,0 +1,1804 @@
> +/*
> + * Freescale GPMI NAND Flash Driver
> + *
> + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
> + * Copyright (C) 2008 Embedded Alley Solutions, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License along
> + * with this program; if not, write to the Free Software Foundation, Inc.,
> + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
> + */
> +#include "gpmi-nand.h"
> +
> +/* add our owner bbt descriptor */
> +static uint8_t scan_ff_pattern[] = { 0xff };
> +static struct nand_bbt_descr gpmi_bbt_descr = {
> + .options = 0,
> + .offs = 0,
> + .len = 1,
> + .pattern = scan_ff_pattern
> +};
> +
> +/* debug control */
> +int gpmi_debug;
> +module_param(gpmi_debug, int, S_IRUGO | S_IWUSR);
> +MODULE_PARM_DESC(gpmi_debug, "print out the debug infomation.");
> +
> +static irqreturn_t bch_irq(int irq, void *cookie)
> +{
> + struct gpmi_nand_data *this = cookie;
> +
> + gpmi_clear_bch(this);
> + complete(&this->bch_done);
> + return IRQ_HANDLED;
> +}
> +
> +/* calculate the ECC strength by hand */
> +static inline int get_ecc_strength(struct gpmi_nand_data *this)
> +{
> + struct mtd_info *mtd = &this->mil.mtd;
> + int ecc_strength = 0;
> +
> + switch (mtd->writesize) {
> + case 2048:
> + ecc_strength = 8;
> + break;
> + case 4096:
> + switch (mtd->oobsize) {
> + case 128:
> + ecc_strength = 8;
> + break;
> + case 224:
> + case 218:
> + ecc_strength = 16;
> + break;
> + }
> + break;
> + case 8192:
> + ecc_strength = 24;
> + break;
> + }
> +
> + return ecc_strength;
> +}
> +
> +static inline int get_ecc_chunk_size(struct gpmi_nand_data *this)
> +{
> + /* for historical reason */
> + return 512;
Can't we just #define this? Or will there ever be something else possible here ?
I thought this is the only possible behaviour on MXS.
> +}
> +
> +int common_nfc_set_geometry(struct gpmi_nand_data *this)
> +{
> + struct bch_geometry *geo = &this->bch_geometry;
> + struct mtd_info *mtd = &this->mil.mtd;
> + unsigned int metadata_size;
> + unsigned int status_size;
> + unsigned int chunk_data_size_in_bits;
> + unsigned int chunk_ecc_size_in_bits;
> + unsigned int chunk_total_size_in_bits;
> + unsigned int block_mark_chunk_number;
> + unsigned int block_mark_chunk_bit_offset;
> + unsigned int block_mark_bit_offset;
> + int gf_len = 13;/* use GP13 by default */
> +
> + /* We only support BCH now. */
> + geo->ecc_algorithm = "BCH";
> +
> + /*
> + * We always choose a metadata size of 10. Don't try to make sense of
> + * it -- this is really only for historical compatibility.
> + */
Historical compat or you mean "the chip was designed this way, see datasheet
section x.y.z"? ;-)
> + geo->metadata_size_in_bytes = 10;
> +
> + /* ECC chunks */
> + geo->ecc_chunk_size_in_bytes = get_ecc_chunk_size(this);
> +
> + /*
> + * Compute the total number of ECC chunks in a page. This includes the
> + * slightly larger chunk at the beginning of the page, which contains
> + * both data and metadata.
> + */
> + geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size_in_bytes;
> +
> + /*
> + * We use the same ECC strength for all chunks, including the first one.
> + */
> + geo->ecc_strength = get_ecc_strength(this);
> + if (!geo->ecc_strength) {
> + pr_info("Page size:%d, OOB:%d\n", mtd->writesize, mtd->oobsize);
> + return -EINVAL;
> + }
> +
> + /* Compute the page size, include page and oob. */
> + geo->page_size_in_bytes = mtd->writesize + mtd->oobsize;
> + geo->payload_size_in_bytes = mtd->writesize;
> +
> + /*
> + * In principle, computing the auxiliary buffer geometry is NFC
> + * version-specific. However, at this writing, all versions share the
> + * same model, so this code can also be shared.
> + *
> + * The auxiliary buffer contains the metadata and the ECC status. The
> + * metadata is padded to the nearest 32-bit boundary. The ECC status
> + * contains one byte for every ECC chunk, and is also padded to the
> + * nearest 32-bit boundary.
> + */
> + metadata_size = ALIGN(geo->metadata_size_in_bytes, 4);
> + status_size = ALIGN(geo->ecc_chunk_count, 4);
> +
> + geo->auxiliary_size_in_bytes = metadata_size + status_size;
> + geo->auxiliary_status_offset = metadata_size;
> +
> + /* Check if we're going to do block mark swapping. */
> + if (!this->swap_block_mark)
> + return 0;
> +
> + /*
> + * If control arrives here, we're doing block mark swapping, so we need
> + * to compute the byte and bit offsets of the physical block mark within
> + * the ECC-based view of the page data. In principle, this isn't a
> + * difficult computation -- but it's very important and it's easy to get
> + * it wrong, so we do it carefully.
> + *
> + * Note that this calculation is simpler because we use the same ECC
> + * strength for all chunks, including the zero'th one, which contains
> + * the metadata. The calculation would be slightly more complicated
> + * otherwise.
> + *
> + * We start by computing the physical bit offset of the block mark. We
> + * then subtract the number of metadata and ECC bits appearing before
> + * the mark to arrive at its bit offset within the data alone.
> + */
> +
> + /* Compute some important facts about chunk geometry. */
> + chunk_data_size_in_bits = geo->ecc_chunk_size_in_bytes * 8;
> + chunk_ecc_size_in_bits = geo->ecc_strength * gf_len;
> + chunk_total_size_in_bits = chunk_data_size_in_bits
> + + chunk_ecc_size_in_bits;
> +
> + /* Compute the bit offset of the block mark within the physical page. */
> + block_mark_bit_offset = mtd->writesize * 8;
> +
> + /* Subtract the metadata bits. */
> + block_mark_bit_offset -= geo->metadata_size_in_bytes * 8;
> +
> + /*
> + * Compute the chunk number (starting at zero) in which the block mark
> + * appears.
> + */
> + block_mark_chunk_number =
> + block_mark_bit_offset / chunk_total_size_in_bits;
> +
> + /*
> + * Compute the bit offset of the block mark within its chunk, and
> + * validate it.
> + */
> + block_mark_chunk_bit_offset =
> + block_mark_bit_offset -
> + (block_mark_chunk_number * chunk_total_size_in_bits);
> +
> + if (block_mark_chunk_bit_offset > chunk_data_size_in_bits) {
> + /*
> + * If control arrives here, the block mark actually appears in
> + * the ECC bits of this chunk. This wont' work.
> + */
> + pr_info("Unsupported page geometry : %u:%u\n",
> + mtd->writesize, mtd->oobsize);
> + return -EINVAL;
> + }
> +
> + /*
> + * Now that we know the chunk number in which the block mark appears,
> + * we can subtract all the ECC bits that appear before it.
> + */
> + block_mark_bit_offset -=
> + block_mark_chunk_number * chunk_ecc_size_in_bits;
> +
> + /*
> + * We now know the absolute bit offset of the block mark within the
> + * ECC-based data. We can now compute the byte offset and the bit
> + * offset within the byte.
> + */
> + geo->block_mark_byte_offset = block_mark_bit_offset / 8;
> + geo->block_mark_bit_offset = block_mark_bit_offset % 8;
> +
> + return 0;
> +}
> +
> +struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
> +{
> + int chip = this->mil.current_chip;
> +
> + BUG_ON(chip < 0);
> + return this->dma_chans[chip];
> +}
> +
> +/* Can we use the upper's buffer directly for DMA? */
> +void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction
> dr) +{
> + struct mil *mil = &this->mil;
> + struct scatterlist *sgl = &mil->data_sgl;
I still see the "MIL" present -- can't we just merge the library and this ?
> + int ret;
> +
> + mil->direct_dma_map_ok = true;
> +
> + /* first try to map the upper buffer directly */
> + sg_init_one(sgl, mil->upper_buf, mil->upper_len);
> + ret = dma_map_sg(this->dev, sgl, 1, dr);
> + if (ret == 0) {
> + /* We have to use our own DMA buffer. */
> + sg_init_one(sgl, mil->data_buffer_dma, PAGE_SIZE);
> +
> + if (dr == DMA_TO_DEVICE)
> + memcpy(mil->data_buffer_dma, mil->upper_buf,
> + mil->upper_len);
> +
> + ret = dma_map_sg(this->dev, sgl, 1, dr);
> + BUG_ON(ret == 0);
> +
> + mil->direct_dma_map_ok = false;
> + }
> +}
> +
> +/* This will be called after the DMA operation is finished. */
> +static void dma_irq_callback(void *param)
> +{
> + struct gpmi_nand_data *this = param;
> + struct mil *mil = &this->mil;
> + struct completion *dma_c = &this->dma_done;
> +
> + complete(dma_c);
> +
> + switch (this->dma_type) {
> + case DMA_FOR_COMMAND:
> + dma_unmap_sg(this->dev, &mil->cmd_sgl, 1, DMA_TO_DEVICE);
> + break;
> +
> + case DMA_FOR_READ_DATA:
> + dma_unmap_sg(this->dev, &mil->data_sgl, 1, DMA_FROM_DEVICE);
> + if (mil->direct_dma_map_ok == false)
> + memcpy(mil->upper_buf, mil->data_buffer_dma,
> + mil->upper_len);
> + break;
> +
> + case DMA_FOR_WRITE_DATA:
> + dma_unmap_sg(this->dev, &mil->data_sgl, 1, DMA_TO_DEVICE);
> + break;
> +
> + case DMA_FOR_READ_ECC_PAGE:
> + case DMA_FOR_WRITE_ECC_PAGE:
> + /* We have to wait the BCH interrupt to finish. */
> + break;
> +
> + default:
> + BUG();
> + }
> +}
> +
> +static void show_bch_geometry(struct bch_geometry *geo)
> +{
> + pr_info("---------------------------------------\n");
> + pr_info(" BCH Geometry\n");
> + pr_info("---------------------------------------\n");
> + pr_info("ECC Algorithm : %s\n", geo->ecc_algorithm);
> + pr_info("ECC Strength : %u\n", geo->ecc_strength);
> + pr_info("Page Size in Bytes : %u\n", geo->page_size_in_bytes);
> + pr_info("Metadata Size in Bytes : %u\n", geo->metadata_size_in_bytes);
> + pr_info("ECC Chunk Size in Bytes: %u\n", geo->ecc_chunk_size_in_bytes);
> + pr_info("ECC Chunk Count : %u\n", geo->ecc_chunk_count);
> + pr_info("Payload Size in Bytes : %u\n", geo->payload_size_in_bytes);
> + pr_info("Auxiliary Size in Bytes: %u\n", geo->auxiliary_size_in_bytes);
> + pr_info("Auxiliary Status Offset: %u\n", geo->auxiliary_status_offset);
> + pr_info("Block Mark Byte Offset : %u\n", geo->block_mark_byte_offset);
> + pr_info("Block Mark Bit Offset : %u\n", geo->block_mark_bit_offset);
> +}
We don't need this.
> +
> +int start_dma_without_bch_irq(struct gpmi_nand_data *this,
> + struct dma_async_tx_descriptor *desc)
> +{
> + struct completion *dma_c = &this->dma_done;
> + int err;
> +
> + init_completion(dma_c);
> +
> + desc->callback = dma_irq_callback;
> + desc->callback_param = this;
> + dmaengine_submit(desc);
> +
> + /* Wait for the interrupt from the DMA block. */
> + err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
> + err = (!err) ? -ETIMEDOUT : 0;
> + if (err) {
> + pr_info("DMA timeout, last DMA :%d\n", this->last_dma_type);
> + if (gpmi_debug & GPMI_DEBUG_CRAZY) {
> + struct bch_geometry *geo = &this->bch_geometry;
> +
> + gpmi_show_regs(this);
> + show_bch_geometry(geo);
> + panic("-----------DMA FAILED------------------");
No, dev_err() or something.
Also, I don't like you using pr_ stuff, I think you can use dev_ stuff, can't you?
> + }
> + }
> + return err;
> +}
> +
> +/*
> + * This function is used in BCH reading or BCH writing pages.
> + * It will wait for the BCH interrupt as long as ONE second.
> + * Actually, we must wait for two interrupts :
> + * [1] firstly the DMA interrupt and
> + * [2] secondly the BCH interrupt.
> + *
> + * @this: Per-device data structure.
> + * @desc: DMA channel
Does this conform to kerneldoc ?
> + */
> +int start_dma_with_bch_irq(struct gpmi_nand_data *this,
> + struct dma_async_tx_descriptor *desc)
> +{
> + int err;
> +
> + /* Prepare to receive an interrupt from the BCH block. */
> + init_completion(&this->bch_done);
> +
> + /* start the DMA */
> + start_dma_without_bch_irq(this, desc);
> +
> + /* Wait for the interrupt from the BCH block. */
> + err = wait_for_completion_timeout(&this->bch_done,
> + msecs_to_jiffies(1000));
> + err = (!err) ? -ETIMEDOUT : 0;
> + if (err) {
> + pr_info("BCH timeout!!!\n");
One ! is enough!!!
> + if (gpmi_debug & GPMI_DEBUG_CRAZY) {
GPMI_DEBUG_CRAZY should probably be GPMI_DEBUG_VERBOSE ?
> + struct bch_geometry *geo = &this->bch_geometry;
> +
> + gpmi_show_regs(this);
> + show_bch_geometry(geo);
> + panic("-----------BCH FAILED------------------");
dev_err()
> + }
> + }
> + return err;
> +}
> +
> +static int __devinit acquire_register_block(struct gpmi_nand_data *this,
> + const char *resource_name, void **reg_block_base)
> +{
> + struct platform_device *pdev = this->pdev;
> + struct resource *r;
> + void *p;
> +
> + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, resource_name);
> + if (!r) {
> + pr_info("Can't get resource for %s\n", resource_name);
> + return -ENXIO;
> + }
> +
> + /* remap the register block */
> + p = ioremap(r->start, resource_size(r));
> + if (!p) {
> + pr_info("Can't remap %s\n", resource_name);
> + return -ENOMEM;
> + }
> +
> + *reg_block_base = p;
> + return 0;
> +}
> +
> +static void release_register_block(struct gpmi_nand_data *this,
> + void *reg_block_base)
> +{
> + iounmap(reg_block_base);
> +}
> +
> +static int __devinit acquire_interrupt(struct gpmi_nand_data *this,
> + const char *resource_name,
> + irq_handler_t interrupt_handler, int *lno, int *hno)
> +{
> + struct platform_device *pdev = this->pdev;
> + struct resource *r;
> + int err;
> +
> + r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, resource_name);
> + if (!r) {
> + pr_info("Can't get resource for %s\n", resource_name);
> + return -ENXIO;
> + }
> +
> + BUG_ON(r->start != r->end);
> + err = request_irq(r->start, interrupt_handler, 0, resource_name, this);
> + if (err) {
> + pr_info("Can't own %s\n", resource_name);
> + return err;
> + }
> +
> + *lno = r->start;
> + *hno = r->end;
> + return 0;
> +}
> +
> +static void release_interrupt(struct gpmi_nand_data *this,
> + int low_interrupt_number, int high_interrupt_number)
> +{
> + int i;
> + for (i = low_interrupt_number; i <= high_interrupt_number; i++)
> + free_irq(i, this);
> +}
> +
> +static bool gpmi_dma_filter(struct dma_chan *chan, void *param)
> +{
> + struct gpmi_nand_data *this = param;
> + struct resource *r = this->private;
> +
> + if (!mxs_dma_is_apbh(chan))
> + return false;
> + /*
> + * only catch the GPMI dma channels :
> + * for mx23 : MX23_DMA_GPMI0 ~ MX23_DMA_GPMI3
> + * (These four channels share the same IRQ!)
> + *
> + * for mx28 : MX28_DMA_GPMI0 ~ MX28_DMA_GPMI7
> + * (These eight channels share the same IRQ!)
> + */
> + if (r->start <= chan->chan_id && chan->chan_id <= r->end) {
> + chan->private = &this->dma_data;
> + return true;
> + }
> + return false;
> +}
> +
> +static void release_dma_channels(struct gpmi_nand_data *this)
> +{
> + unsigned int i;
> + for (i = 0; i < DMA_CHANS; i++)
> + if (this->dma_chans[i]) {
> + dma_release_channel(this->dma_chans[i]);
> + this->dma_chans[i] = NULL;
> + }
> +}
> +
> +static int __devinit acquire_dma_channels(struct gpmi_nand_data *this,
> + const char *resource_name,
> + unsigned *low_channel, unsigned *high_channel)
> +{
> + struct platform_device *pdev = this->pdev;
> + struct gpmi_nand_platform_data *pdata = this->pdata;
> + struct resource *r, *r_dma;
> + unsigned int i;
> +
> + r = platform_get_resource_byname(pdev, IORESOURCE_DMA, resource_name);
> + r_dma = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
> + GPMI_NAND_DMA_INTERRUPT_RES_NAME);
> + if (!r || !r_dma) {
> + pr_info("Can't get resource for DMA\n");
> + return -ENXIO;
> + }
> +
> + /* used in gpmi_dma_filter() */
> + this->private = r;
> +
> + for (i = r->start; i <= r->end; i++) {
> + struct dma_chan *dma_chan;
> + dma_cap_mask_t mask;
> +
> + if (i - r->start >= pdata->max_chip_count)
> + break;
> +
> + dma_cap_zero(mask);
> + dma_cap_set(DMA_SLAVE, mask);
> +
> + /* get the DMA interrupt */
> + if (r_dma->start == r_dma->end) {
> + /* only register the first. */
> + if (i == r->start)
> + this->dma_data.chan_irq = r_dma->start;
> + else
> + this->dma_data.chan_irq = NO_IRQ;
> + } else
> + this->dma_data.chan_irq = r_dma->start + (i - r->start);
> +
> + dma_chan = dma_request_channel(mask, gpmi_dma_filter, this);
> + if (!dma_chan)
> + goto acquire_err;
> +
> + /* fill the first empty item */
> + this->dma_chans[i - r->start] = dma_chan;
> + }
> +
> + *low_channel = r->start;
> + *high_channel = i;
> + return 0;
> +
> +acquire_err:
> + pr_info("Can't acquire DMA channel %u\n", i);
> + release_dma_channels(this);
> + return -EINVAL;
> +}
> +
> +static int __devinit acquire_resources(struct gpmi_nand_data *this)
> +{
> + struct resources *r = &this->resources;
> + int error;
> +
> + /* Attempt to acquire the GPMI register block. */
> + error = acquire_register_block(this,
> + GPMI_NAND_GPMI_REGS_ADDR_RES_NAME,
> + &r->gpmi_regs);
You're already passing "this", why pass r->gpmi_regs? Please fix globally.
> + if (error)
> + goto exit_gpmi_regs;
> +
> + /* Attempt to acquire the BCH register block. */
> + error = acquire_register_block(this,
> + GPMI_NAND_BCH_REGS_ADDR_RES_NAME,
> + &r->bch_regs);
> + if (error)
> + goto exit_bch_regs;
> +
> + /* Attempt to acquire the BCH interrupt. */
> + error = acquire_interrupt(this,
> + GPMI_NAND_BCH_INTERRUPT_RES_NAME,
> + bch_irq,
> + &r->bch_low_interrupt,
> + &r->bch_high_interrupt);
> + if (error)
> + goto exit_bch_interrupt;
> +
> + /* Attempt to acquire the DMA channels. */
> + error = acquire_dma_channels(this,
> + GPMI_NAND_DMA_CHANNELS_RES_NAME,
> + &r->dma_low_channel,
> + &r->dma_high_channel);
> + if (error)
> + goto exit_dma_channels;
> +
> + /* Attempt to acquire our clock. */
> + r->clock = clk_get(&this->pdev->dev, NULL);
> + if (IS_ERR(r->clock)) {
> + pr_info("can not get the clock\n");
> + error = -ENOENT;
> + goto exit_clock;
> + }
> + return 0;
> +
> +exit_clock:
> + release_dma_channels(this);
> +exit_dma_channels:
> + release_interrupt(this, r->bch_low_interrupt, r->bch_high_interrupt);
> +exit_bch_interrupt:
> + release_register_block(this, r->bch_regs);
> +exit_bch_regs:
> + release_register_block(this, r->gpmi_regs);
> +exit_gpmi_regs:
> + return error;
> +}
> +
> +static void release_resources(struct gpmi_nand_data *this)
> +{
> + struct resources *r = &this->resources;
> +
> + clk_put(r->clock);
> + release_register_block(this, r->gpmi_regs);
> + release_register_block(this, r->bch_regs);
> + release_interrupt(this, r->bch_low_interrupt, r->bch_low_interrupt);
> + release_dma_channels(this);
> +}
> +
> +static int __devinit init_hardware(struct gpmi_nand_data *this)
> +{
> + int error;
> +
> + /*
> + * This structure contains the "safe" GPMI timing that should succeed
> + * with any NAND Flash device
> + * (although, with less-than-optimal performance).
> + */
> + struct nand_timing safe_timing = {
> + .data_setup_in_ns = 80,
> + .data_hold_in_ns = 60,
> + .address_setup_in_ns = 25,
> + .gpmi_sample_delay_in_ns = 6,
> + .tREA_in_ns = -1,
> + .tRLOH_in_ns = -1,
> + .tRHOH_in_ns = -1,
> + };
> +
> + /* Initialize the hardwares. */
> + error = gpmi_init(this);
> + if (error)
> + return error;
> +
> + this->timing = safe_timing;
> + return 0;
> +}
> +
> +static int read_page_prepare(struct gpmi_nand_data *this,
> + void *destination, unsigned length,
> + void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
> + void **use_virt, dma_addr_t *use_phys)
> +{
> + struct device *dev = this->dev;
> +
> + if (virt_addr_valid(destination)) {
> + dma_addr_t dest_phys;
> +
> + dest_phys = dma_map_single(dev, destination,
> + length, DMA_FROM_DEVICE);
> + if (dma_mapping_error(dev, dest_phys)) {
> + if (alt_size < length) {
> + pr_info("Alternate buffer is too small\n");
> + return -ENOMEM;
> + }
> + goto map_failed;
> + }
> + *use_virt = destination;
> + *use_phys = dest_phys;
> + this->mil.direct_dma_map_ok = true;
> + return 0;
> + }
> +
> +map_failed:
> + *use_virt = alt_virt;
> + *use_phys = alt_phys;
> + this->mil.direct_dma_map_ok = false;
> + return 0;
> +}
> +
> +static inline void read_page_end(struct gpmi_nand_data *this,
> + void *destination, unsigned length,
> + void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
> + void *used_virt, dma_addr_t used_phys)
> +{
> + if (this->mil.direct_dma_map_ok)
> + dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
> +}
> +
> +static inline void read_page_swap_end(struct gpmi_nand_data *this,
> + void *destination, unsigned length,
> + void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
> + void *used_virt, dma_addr_t used_phys)
> +{
> + if (!this->mil.direct_dma_map_ok)
> + memcpy(destination, alt_virt, length);
> +}
> +
> +static int send_page_prepare(struct gpmi_nand_data *this,
> + const void *source, unsigned length,
> + void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
> + const void **use_virt, dma_addr_t *use_phys)
> +{
> + struct device *dev = this->dev;
> +
> + if (virt_addr_valid(source)) {
> + dma_addr_t source_phys;
> +
> + source_phys = dma_map_single(dev, (void *)source, length,
> + DMA_TO_DEVICE);
> + if (dma_mapping_error(dev, source_phys)) {
> + if (alt_size < length) {
> + pr_info("Alternate buffer is too small\n");
> + return -ENOMEM;
> + }
> + goto map_failed;
> + }
> + *use_virt = source;
> + *use_phys = source_phys;
> + return 0;
> + }
> +map_failed:
> + /*
> + * Copy the content of the source buffer into the alternate
> + * buffer and set up the return values accordingly.
> + */
> + memcpy(alt_virt, source, length);
> +
> + *use_virt = alt_virt;
> + *use_phys = alt_phys;
> + return 0;
> +}
> +
> +static void send_page_end(struct gpmi_nand_data *this,
> + const void *source, unsigned length,
> + void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
> + const void *used_virt, dma_addr_t used_phys)
> +{
> + struct device *dev = this->dev;
> + if (used_virt == source)
> + dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
> +}
> +
> +static void mil_free_dma_buffer(struct gpmi_nand_data *this)
> +{
> + struct device *dev = this->dev;
> + struct mil *mil = &this->mil;
> +
> + if (mil->page_buffer_virt && virt_addr_valid(mil->page_buffer_virt))
> + dma_free_coherent(dev, mil->page_buffer_size,
> + mil->page_buffer_virt,
> + mil->page_buffer_phys);
> + kfree(mil->cmd_buffer);
> + kfree(mil->data_buffer_dma);
> +
> + mil->cmd_buffer = NULL;
> + mil->data_buffer_dma = NULL;
> + mil->page_buffer_virt = NULL;
> + mil->page_buffer_size = 0;
> +}
> +
> +/* Allocate the DMA buffers */
> +static int mil_alloc_dma_buffer(struct gpmi_nand_data *this)
> +{
> + struct bch_geometry *geo = &this->bch_geometry;
> + struct device *dev = this->dev;
> + struct mil *mil = &this->mil;
> +
> + /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
> + mil->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA);
> + if (mil->cmd_buffer == NULL)
> + goto error_alloc;
> +
> + /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */
> + mil->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA);
> + if (mil->data_buffer_dma == NULL)
> + goto error_alloc;
> +
> + /*
> + * [3] Allocate the page buffer.
> + *
> + * Both the payload buffer and the auxiliary buffer must appear on
> + * 32-bit boundaries. We presume the size of the payload buffer is a
> + * power of two and is much larger than four, which guarantees the
> + * auxiliary buffer will appear on a 32-bit boundary.
> + */
> + mil->page_buffer_size = geo->payload_size_in_bytes +
> + geo->auxiliary_size_in_bytes;
> +
> + mil->page_buffer_virt = dma_alloc_coherent(dev, mil->page_buffer_size,
> + &mil->page_buffer_phys, GFP_DMA);
> + if (!mil->page_buffer_virt)
> + goto error_alloc;
> +
> +
> + /* Slice up the page buffer. */
> + mil->payload_virt = mil->page_buffer_virt;
> + mil->payload_phys = mil->page_buffer_phys;
> + mil->auxiliary_virt = mil->payload_virt + geo->payload_size_in_bytes;
> + mil->auxiliary_phys = mil->payload_phys + geo->payload_size_in_bytes;
> + return 0;
> +
> +error_alloc:
> + mil_free_dma_buffer(this);
> + pr_info("allocate DMA buffer error!!\n");
> + return -ENOMEM;
> +}
> +
> +static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int
> ctrl) +{
> + struct nand_chip *nand = mtd->priv;
> + struct gpmi_nand_data *this = nand->priv;
> + struct mil *mil = &this->mil;
> + int error;
> +
> + /*
> + * Every operation begins with a command byte and a series of zero or
> + * more address bytes. These are distinguished by either the Address
> + * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
> + * asserted. When MTD is ready to execute the command, it will deassert
> + * both latch enables.
> + *
> + * Rather than run a separate DMA operation for every single byte, we
> + * queue them up and run a single DMA operation for the entire series
> + * of command and data bytes. NAND_CMD_NONE means the END of the queue.
> + */
> + if ((ctrl & (NAND_ALE | NAND_CLE))) {
> + if (data != NAND_CMD_NONE)
> + mil->cmd_buffer[mil->command_length++] = data;
> + return;
> + }
> +
> + if (!mil->command_length)
> + return;
> +
> + error = gpmi_send_command(this);
> + if (error)
> + pr_info("Chip: %u, Error %d\n", mil->current_chip, error);
> +
> + mil->command_length = 0;
> +}
> +
> +static int gpmi_dev_ready(struct mtd_info *mtd)
> +{
> + struct nand_chip *nand = mtd->priv;
> + struct gpmi_nand_data *this = nand->priv;
> + struct mil *mil = &this->mil;
> +
> + return gpmi_is_ready(this, mil->current_chip);
> +}
> +
> +static void gpmi_select_chip(struct mtd_info *mtd, int chip)
> +{
> + struct nand_chip *nand = mtd->priv;
> + struct gpmi_nand_data *this = nand->priv;
> + struct mil *mil = &this->mil;
> +
> + if ((mil->current_chip < 0) && (chip >= 0))
> + gpmi_begin(this);
> + else if ((mil->current_chip >= 0) && (chip < 0))
> + gpmi_end(this);
> + else
> + ;
Do you need this else branch at all?
> +
> + mil->current_chip = chip;
> +}
> +
> +static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
> +{
> + struct nand_chip *nand = mtd->priv;
> + struct gpmi_nand_data *this = nand->priv;
> + struct mil *mil = &this->mil;
> +
> + logio(GPMI_DEBUG_READ);
> + /* save the info in mil{} for future */
> + mil->upper_buf = buf;
> + mil->upper_len = len;
> +
> + gpmi_read_data(this);
> +}
> +
> +static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int
> len) +{
> + struct nand_chip *nand = mtd->priv;
> + struct gpmi_nand_data *this = nand->priv;
> + struct mil *mil = &this->mil;
> +
> + logio(GPMI_DEBUG_WRITE);
> + /* save the info in mil{} for future */
> + mil->upper_buf = (uint8_t *)buf;
> + mil->upper_len = len;
> +
> + gpmi_send_data(this);
> +}
> +
> +static uint8_t gpmi_read_byte(struct mtd_info *mtd)
> +{
> + struct nand_chip *nand = mtd->priv;
> + struct gpmi_nand_data *this = nand->priv;
> + struct mil *mil = &this->mil;
> + uint8_t *buf = mil->data_buffer_dma;
> +
> + gpmi_read_buf(mtd, buf, 1);
> + return buf[0];
> +}
> +
> +/**
> + * mil_handle_block_mark_swapping() - Handles block mark swapping.
> + *
> + * Note that, when this function is called, it doesn't know whether it's
> + * swapping the block mark, or swapping it *back* -- but it doesn't matter
> + * because the the operation is the same.
> + *
> + * @this: Per-device data.
> + * @payload: A pointer to the payload buffer.
> + * @auxiliary: A pointer to the auxiliary buffer.
> + */
> +static void mil_handle_block_mark_swapping(struct gpmi_nand_data *this,
> + void *payload, void *auxiliary)
> +{
> + struct bch_geometry *nfc_geo = &this->bch_geometry;
> + unsigned char *p;
> + unsigned char *a;
> + unsigned int bit;
> + unsigned char mask;
> + unsigned char from_data;
> + unsigned char from_oob;
> +
> + /* Check if we're doing block mark swapping. */
> + if (!this->swap_block_mark)
> + return;
> +
> + /*
> + * If control arrives here, we're swapping. Make some convenience
> + * variables.
> + */
> + bit = nfc_geo->block_mark_bit_offset;
> + p = payload + nfc_geo->block_mark_byte_offset;
> + a = auxiliary;
> +
> + /*
> + * Get the byte from the data area that overlays the block mark. Since
> + * the ECC engine applies its own view to the bits in the page, the
> + * physical block mark won't (in general) appear on a byte boundary in
> + * the data.
> + */
> + from_data = (p[0] >> bit) | (p[1] << (8 - bit));
> +
> + /* Get the byte from the OOB. */
> + from_oob = a[0];
> +
> + /* Swap them. */
> + a[0] = from_data;
> +
> + mask = (0x1 << bit) - 1;
> + p[0] = (p[0] & mask) | (from_oob << bit);
> +
> + mask = ~0 << bit;
> + p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
> +}
> +
> +static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip
> *nand, + uint8_t *buf, int page)
> +{
> + struct gpmi_nand_data *this = nand->priv;
> + struct bch_geometry *nfc_geo = &this->bch_geometry;
> + struct mil *mil = &this->mil;
> + void *payload_virt;
> + dma_addr_t payload_phys;
> + void *auxiliary_virt;
> + dma_addr_t auxiliary_phys;
> + unsigned int i;
> + unsigned char *status;
> + unsigned int failed;
> + unsigned int corrected;
> + int error;
> +
> + logio(GPMI_DEBUG_ECC_READ);
> + error = read_page_prepare(this, buf, mtd->writesize,
> + mil->payload_virt, mil->payload_phys,
> + nfc_geo->payload_size_in_bytes,
> + &payload_virt, &payload_phys);
> + if (error) {
> + pr_info("Inadequate DMA buffer\n");
> + error = -ENOMEM;
> + return error;
> + }
> + auxiliary_virt = mil->auxiliary_virt;
> + auxiliary_phys = mil->auxiliary_phys;
> +
> + /* go! */
> + error = gpmi_read_page(this, payload_phys, auxiliary_phys);
> + read_page_end(this, buf, mtd->writesize,
> + mil->payload_virt, mil->payload_phys,
> + nfc_geo->payload_size_in_bytes,
> + payload_virt, payload_phys);
> + if (error) {
> + pr_info("Error in ECC-based read: %d\n", error);
> + goto exit_nfc;
> + }
> +
> + /* handle the block mark swapping */
> + mil_handle_block_mark_swapping(this, payload_virt, auxiliary_virt);
> +
> + /* Loop over status bytes, accumulating ECC status. */
> + failed = 0;
> + corrected = 0;
> + status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
> +
> + for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
> + if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
> + continue;
> +
> + if (*status == STATUS_UNCORRECTABLE) {
> + failed++;
> + continue;
> + }
> + corrected += *status;
> + }
> +
> + /*
> + * Propagate ECC status to the owning MTD only when failed or
> + * corrected times nearly reaches our ECC correction threshold.
> + */
> + if (failed || corrected >= (nfc_geo->ecc_strength - 1)) {
> + mtd->ecc_stats.failed += failed;
> + mtd->ecc_stats.corrected += corrected;
> + }
> +
> + /*
> + * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() for
> + * details about our policy for delivering the OOB.
> + *
> + * We fill the caller's buffer with set bits, and then copy the block
> + * mark to th caller's buffer. Note that, if block mark swapping was
> + * necessary, it has already been done, so we can rely on the first
> + * byte of the auxiliary buffer to contain the block mark.
> + */
> + memset(nand->oob_poi, ~0, mtd->oobsize);
> + nand->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
> +
> + read_page_swap_end(this, buf, mtd->writesize,
> + mil->payload_virt, mil->payload_phys,
> + nfc_geo->payload_size_in_bytes,
> + payload_virt, payload_phys);
> +exit_nfc:
> + return error;
> +}
> +
> +static void gpmi_ecc_write_page(struct mtd_info *mtd,
> + struct nand_chip *nand, const uint8_t *buf)
> +{
> + struct gpmi_nand_data *this = nand->priv;
> + struct bch_geometry *nfc_geo = &this->bch_geometry;
> + struct mil *mil = &this->mil;
> + const void *payload_virt;
> + dma_addr_t payload_phys;
> + const void *auxiliary_virt;
> + dma_addr_t auxiliary_phys;
> + int error;
> +
> + logio(GPMI_DEBUG_ECC_WRITE);
> + if (this->swap_block_mark) {
> + /*
> + * If control arrives here, we're doing block mark swapping.
> + * Since we can't modify the caller's buffers, we must copy them
> + * into our own.
> + */
> + memcpy(mil->payload_virt, buf, mtd->writesize);
> + payload_virt = mil->payload_virt;
> + payload_phys = mil->payload_phys;
> +
> + memcpy(mil->auxiliary_virt, nand->oob_poi,
> + nfc_geo->auxiliary_size_in_bytes);
> + auxiliary_virt = mil->auxiliary_virt;
> + auxiliary_phys = mil->auxiliary_phys;
> +
> + /* Handle block mark swapping. */
> + mil_handle_block_mark_swapping(this,
> + (void *) payload_virt, (void *) auxiliary_virt);
> + } else {
> + /*
> + * If control arrives here, we're not doing block mark swapping,
> + * so we can to try and use the caller's buffers.
> + */
> + error = send_page_prepare(this,
> + buf, mtd->writesize,
> + mil->payload_virt, mil->payload_phys,
> + nfc_geo->payload_size_in_bytes,
> + &payload_virt, &payload_phys);
> + if (error) {
> + pr_info("Inadequate payload DMA buffer\n");
> + return;
> + }
> +
> + error = send_page_prepare(this,
> + nand->oob_poi, mtd->oobsize,
> + mil->auxiliary_virt, mil->auxiliary_phys,
> + nfc_geo->auxiliary_size_in_bytes,
> + &auxiliary_virt, &auxiliary_phys);
> + if (error) {
> + pr_info("Inadequate auxiliary DMA buffer\n");
> + goto exit_auxiliary;
> + }
> + }
> +
> + /* Ask the NFC. */
> + error = gpmi_send_page(this, payload_phys, auxiliary_phys);
> + if (error)
> + pr_info("Error in ECC-based write: %d\n", error);
> +
> + if (!this->swap_block_mark) {
> + send_page_end(this, nand->oob_poi, mtd->oobsize,
> + mil->auxiliary_virt, mil->auxiliary_phys,
> + nfc_geo->auxiliary_size_in_bytes,
> + auxiliary_virt, auxiliary_phys);
> +exit_auxiliary:
> + send_page_end(this, buf, mtd->writesize,
> + mil->payload_virt, mil->payload_phys,
> + nfc_geo->payload_size_in_bytes,
> + payload_virt, payload_phys);
> + }
> +}
> +
> +/**
> + * gpmi_ecc_read_oob() - MTD Interface ecc.read_oob().
> + *
> + * There are several places in this driver where we have to handle the OOB
> and + * block marks. This is the function where things are the most
> complicated, so + * this is where we try to explain it all. All the other
> places refer back to + * here.
> + *
> + * These are the rules, in order of decreasing importance:
> + *
> + * 1) Nothing the caller does can be allowed to imperil the block mark, so
> all + * write operations take measures to protect it.
> + *
> + * 2) In read operations, the first byte of the OOB we return must reflect
> the + * true state of the block mark, no matter where that block mark
> appears in + * the physical page.
> + *
> + * 3) ECC-based read operations return an OOB full of set bits (since we
> never + * allow ECC-based writes to the OOB, it doesn't matter what
> ECC-based reads + * return).
> + *
> + * 4) "Raw" read operations return a direct view of the physical bytes in
> the + * page, using the conventional definition of which bytes are data
> and which + * are OOB. This gives the caller a way to see the actual,
> physical bytes + * in the page, without the distortions applied by our
> ECC engine. + *
> + *
> + * What we do for this specific read operation depends on two questions:
> + *
> + * 1) Are we doing a "raw" read, or an ECC-based read?
> + *
> + * 2) Are we using block mark swapping or transcription?
> + *
> + * There are four cases, illustrated by the following Karnaugh map:
> + *
> + * | Raw | ECC-based
> | + *
> -------------+-------------------------+-------------------------+ + *
> | Read the conventional | | + *
> | OOB at the end of the | | + *
> Swapping | page and return it. It | | +
> * | contains exactly what | |
> + * | we want. | Read the block mark and
> | + * -------------+-------------------------+ return it in a buffer
> | + * | Read the conventional | full of set bits.
> | + * | OOB at the end of the |
> | + * | page and also the block |
> | + * Transcribing | mark in the metadata. |
> | + * | Copy the block mark |
> | + * | into the first byte of |
> | + * | the OOB. |
> | + *
> -------------+-------------------------+-------------------------+ + *
> + * Note that we break rule #4 in the Transcribing/Raw case because we're
> not + * giving an accurate view of the actual, physical bytes in the page
> (we're + * overwriting the block mark). That's OK because it's more
> important to follow + * rule #2.
> + *
> + * It turns out that knowing whether we want an "ECC-based" or "raw" read
> is not + * easy. When reading a page, for example, the NAND Flash MTD code
> calls our + * ecc.read_page or ecc.read_page_raw function. Thus, the fact
> that MTD wants an + * ECC-based or raw view of the page is implicit in
> which function it calls + * (there is a similar pair of ECC-based/raw
> functions for writing). + *
> + * Since MTD assumes the OOB is not covered by ECC, there is no pair of
> + * ECC-based/raw functions for reading or or writing the OOB. The fact
> that the + * caller wants an ECC-based or raw view of the page is not
> propagated down to + * this driver.
> + *
> + * @mtd: A pointer to the owning MTD.
> + * @nand: A pointer to the owning NAND Flash MTD.
> + * @page: The page number to read.
> + * @sndcmd: Indicates this function should send a command to the chip
> before + * reading the out-of-band bytes. This is only false for
> small page + * chips that support auto-increment.
> + */
> +static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *nand,
> + int page, int sndcmd)
> +{
> + struct gpmi_nand_data *this = nand->priv;
> +
> + /* clear the OOB buffer */
> + memset(nand->oob_poi, ~0, mtd->oobsize);
> +
> + /* Read out the conventional OOB. */
> + nand->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
> + nand->read_buf(mtd, nand->oob_poi, mtd->oobsize);
> +
> + /*
> + * Now, we want to make sure the block mark is correct. In the
> + * Swapping/Raw case, we already have it. Otherwise, we need to
> + * explicitly read it.
> + */
> + if (!this->swap_block_mark) {
> + /* Read the block mark into the first byte of the OOB buffer. */
> + nand->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
> + nand->oob_poi[0] = nand->read_byte(mtd);
> + }
> +
> + /*
> + * Return true, indicating that the next call to this function must send
> + * a command.
> + */
> + return true;
> +}
> +
> +static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
> +{
> + struct nand_chip *nand = mtd->priv;
> + struct gpmi_nand_data *this = nand->priv;
> + int block, ret = 0;
> +
> + /* Get block number */
> + block = (int)(ofs >> nand->bbt_erase_shift);
> + if (nand->bbt)
> + nand->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
> +
> + /* Do we have a flash based bad block table ? */
> + if (nand->options & NAND_USE_FLASH_BBT)
> + ret = nand_update_bbt(mtd, ofs);
if (stuff)
return nand_update_bbt();
stuff from else branch
.
.
.
Besides, please don't declare variables in the middle of code.
> + else {
> + struct mil *mil = &this->mil;
> + uint8_t *block_mark;
> + int column, page, status, chipnr;
> +
> + chipnr = (int)(ofs >> nand->chip_shift);
> + nand->select_chip(mtd, chipnr);
> +
> + column = this->swap_block_mark ? mtd->writesize : 0;
> +
> + /* Write the block mark. */
> + block_mark = mil->data_buffer_dma;
> + block_mark[0] = 0; /* bad block marker */
> +
> + /* Shift to get page */
> + page = (int)(ofs >> nand->page_shift);
> +
> + nand->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
> + nand->write_buf(mtd, block_mark, 1);
> + nand->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
> +
> + status = nand->waitfunc(mtd, nand);
> + if (status & NAND_STATUS_FAIL)
> + ret = -EIO;
> +
> + nand->select_chip(mtd, -1);
> + }
> + if (!ret)
> + mtd->ecc_stats.badblocks++;
> +
> + return ret;
> +}
> +
> +static int __devinit nand_boot_set_geometry(struct gpmi_nand_data *this)
> +{
> + struct boot_rom_geometry *geometry = &this->rom_geometry;
> +
> + /*
> + * Set the boot block stride size.
> + *
> + * In principle, we should be reading this from the OTP bits, since
> + * that's where the ROM is going to get it. In fact, we don't have any
> + * way to read the OTP bits, so we go with the default and hope for the
> + * best.
> + */
> + geometry->stride_size_in_pages = 64;
> +
> + /*
> + * Set the search area stride exponent.
> + *
> + * In principle, we should be reading this from the OTP bits, since
> + * that's where the ROM is going to get it. In fact, we don't have any
> + * way to read the OTP bits, so we go with the default and hope for the
> + * best.
> + */
> + geometry->search_area_stride_exponent = 2;
> +
> + if (gpmi_debug & GPMI_DEBUG_INIT)
> + pr_info("stride size in page : %d, search areas : %d\n",
> + geometry->stride_size_in_pages,
> + geometry->search_area_stride_exponent);
> + return 0;
> +}
> +
> +static const char *fingerprint = "STMP";
> +static int __devinit mx23_check_transcription_stamp(struct gpmi_nand_data
> *this) +{
> + struct boot_rom_geometry *rom_geo = &this->rom_geometry;
> + struct mil *mil = &this->mil;
> + struct mtd_info *mtd = &mil->mtd;
> + struct nand_chip *nand = &mil->nand;
> + unsigned int search_area_size_in_strides;
> + unsigned int stride;
> + unsigned int page;
> + loff_t byte;
> + uint8_t *buffer = nand->buffers->databuf;
> + int saved_chip_number;
> + int found_an_ncb_fingerprint = false;
> +
> + /* Compute the number of strides in a search area. */
> + search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
> +
> + /* Select chip 0. */
> + saved_chip_number = mil->current_chip;
> + nand->select_chip(mtd, 0);
> +
> + /*
> + * Loop through the first search area, looking for the NCB fingerprint.
> + */
> + pr_info("Scanning for an NCB fingerprint...\n");
> +
> + for (stride = 0; stride < search_area_size_in_strides; stride++) {
> + /* Compute the page and byte addresses. */
> + page = stride * rom_geo->stride_size_in_pages;
> + byte = page * mtd->writesize;
> +
> + pr_info(" Looking for a fingerprint in page 0x%x\n", page);
pr_info? Why, who cares, I'd prefer dev_dbg()?
> +
> + /*
> + * Read the NCB fingerprint. The fingerprint is four bytes long
> + * and starts in the 12th byte of the page.
> + */
> + nand->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
> + nand->read_buf(mtd, buffer, strlen(fingerprint));
> +
> + /* Look for the fingerprint. */
> + if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
> + found_an_ncb_fingerprint = true;
> + break;
> + }
> +
> + }
> +
> + /* Deselect chip 0. */
> + nand->select_chip(mtd, saved_chip_number);
> +
> + if (found_an_ncb_fingerprint)
> + pr_info(" Found a fingerprint\n");
> + else
> + pr_info(" No fingerprint found\n");
> + return found_an_ncb_fingerprint;
> +}
> +
> +/* Writes a transcription stamp. */
> +static int __devinit mx23_write_transcription_stamp(struct gpmi_nand_data
> *this) +{
> + struct device *dev = this->dev;
> + struct boot_rom_geometry *rom_geo = &this->rom_geometry;
> + struct mil *mil = &this->mil;
> + struct mtd_info *mtd = &mil->mtd;
> + struct nand_chip *nand = &mil->nand;
> + unsigned int block_size_in_pages;
> + unsigned int search_area_size_in_strides;
> + unsigned int search_area_size_in_pages;
> + unsigned int search_area_size_in_blocks;
> + unsigned int block;
> + unsigned int stride;
> + unsigned int page;
> + loff_t byte;
> + uint8_t *buffer = nand->buffers->databuf;
> + int saved_chip_number;
> + int status;
> +
> + /* Compute the search area geometry. */
> + block_size_in_pages = mtd->erasesize / mtd->writesize;
> + search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
> + search_area_size_in_pages = search_area_size_in_strides *
> + rom_geo->stride_size_in_pages;
> + search_area_size_in_blocks =
> + (search_area_size_in_pages + (block_size_in_pages - 1)) /
> + block_size_in_pages;
> +
> + pr_info("-------------------------------------------\n");
> + pr_info("Search Area Geometry\n");
> + pr_info("-------------------------------------------\n");
> + pr_info("Search Area in Blocks : %u\n", search_area_size_in_blocks);
> + pr_info("Search Area in Strides: %u\n", search_area_size_in_strides);
> + pr_info("Search Area in Pages : %u\n", search_area_size_in_pages);
Maybe if you debug it, yes ... but I certainly don't want such ascii-art in my
log during normal operation.
> +
> + /* Select chip 0. */
> + saved_chip_number = mil->current_chip;
> + nand->select_chip(mtd, 0);
> +
> + /* Loop over blocks in the first search area, erasing them. */
> + pr_info("Erasing the search area...\n");
> +
> + for (block = 0; block < search_area_size_in_blocks; block++) {
> + /* Compute the page address. */
> + page = block * block_size_in_pages;
> +
> + /* Erase this block. */
> + pr_info(" Erasing block 0x%x\n", block);
> + nand->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
> + nand->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
> +
> + /* Wait for the erase to finish. */
> + status = nand->waitfunc(mtd, nand);
> + if (status & NAND_STATUS_FAIL)
> + dev_err(dev, "[%s] Erase failed.\n", __func__);
> + }
> +
> + /* Write the NCB fingerprint into the page buffer. */
> + memset(buffer, ~0, mtd->writesize);
> + memset(nand->oob_poi, ~0, mtd->oobsize);
> + memcpy(buffer + 12, fingerprint, strlen(fingerprint));
> +
> + /* Loop through the first search area, writing NCB fingerprints. */
> + pr_info("Writing NCB fingerprints...\n");
> + for (stride = 0; stride < search_area_size_in_strides; stride++) {
> + /* Compute the page and byte addresses. */
> + page = stride * rom_geo->stride_size_in_pages;
> + byte = page * mtd->writesize;
> +
> + /* Write the first page of the current stride. */
> + pr_info(" Writing an NCB fingerprint in page 0x%x\n", page);
> + nand->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
> + nand->ecc.write_page_raw(mtd, nand, buffer);
> + nand->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
> +
> + /* Wait for the write to finish. */
> + status = nand->waitfunc(mtd, nand);
> + if (status & NAND_STATUS_FAIL)
> + dev_err(dev, "[%s] Write failed.\n", __func__);
> + }
> +
> + /* Deselect chip 0. */
> + nand->select_chip(mtd, saved_chip_number);
> + return 0;
> +}
> +
> +static int __devinit mx23_boot_init(struct gpmi_nand_data *this)
> +{
> + struct device *dev = this->dev;
> + struct mil *mil = &this->mil;
> + struct nand_chip *nand = &mil->nand;
> + struct mtd_info *mtd = &mil->mtd;
> + unsigned int block_count;
> + unsigned int block;
> + int chip;
> + int page;
> + loff_t byte;
> + uint8_t block_mark;
> + int error = 0;
> +
> + /*
> + * If control arrives here, we can't use block mark swapping, which
> + * means we're forced to use transcription. First, scan for the
> + * transcription stamp. If we find it, then we don't have to do
> + * anything -- the block marks are already transcribed.
> + */
> + if (mx23_check_transcription_stamp(this))
> + return 0;
> +
> + /*
> + * If control arrives here, we couldn't find a transcription stamp, so
> + * so we presume the block marks are in the conventional location.
> + */
> + pr_info("Transcribing bad block marks...\n");
> +
> + /* Compute the number of blocks in the entire medium. */
> + block_count = nand->chipsize >> nand->phys_erase_shift;
> +
> + /*
> + * Loop over all the blocks in the medium, transcribing block marks as
> + * we go.
> + */
> + for (block = 0; block < block_count; block++) {
> + /*
> + * Compute the chip, page and byte addresses for this block's
> + * conventional mark.
> + */
> + chip = block >> (nand->chip_shift - nand->phys_erase_shift);
> + page = block << (nand->phys_erase_shift - nand->page_shift);
> + byte = block << nand->phys_erase_shift;
> +
> + /* Send the command to read the conventional block mark. */
> + nand->select_chip(mtd, chip);
> + nand->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
> + block_mark = nand->read_byte(mtd);
> + nand->select_chip(mtd, -1);
> +
> + /*
> + * Check if the block is marked bad. If so, we need to mark it
> + * again, but this time the result will be a mark in the
> + * location where we transcribe block marks.
> + */
> + if (block_mark != 0xff) {
> + pr_info("Transcribing mark in block %u\n", block);
> + error = nand->block_markbad(mtd, byte);
> + if (error)
> + dev_err(dev, "Failed to mark block bad with "
> + "error %d\n", error);
> + }
> + }
> +
> + /* Write the stamp that indicates we've transcribed the block marks. */
> + mx23_write_transcription_stamp(this);
> + return 0;
> +}
> +
> +static int __devinit nand_boot_init(struct gpmi_nand_data *this)
> +{
> + nand_boot_set_geometry(this);
> +
> + /* This is ROM arch-specific initilization before the BBT scanning. */
> + if (GPMI_IS_MX23(this))
> + return mx23_boot_init(this);
> + return 0;
> +}
> +
> +static int __devinit mil_set_geometry(struct gpmi_nand_data *this)
> +{
> + int error;
> +
> + /* Free the temporary DMA memory for reading ID. */
> + mil_free_dma_buffer(this);
> +
> + /* Set up the NFC geometry which is used by BCH. */
> + error = bch_set_geometry(this);
> + if (error) {
> + pr_info("set geometry error : %d\n", error);
> + return error;
> + }
> +
> + /* Alloc the new DMA buffers according to the pagesize and oobsize */
> + return mil_alloc_dma_buffer(this);
> +}
> +
> +static int mil_pre_bbt_scan(struct gpmi_nand_data *this)
> +{
> + struct nand_chip *nand = &this->mil.nand;
> + struct mtd_info *mtd = &this->mil.mtd;
> + struct nand_ecclayout *layout = nand->ecc.layout;
> + int error;
> +
> + /*
> + * fix the ECC layout before the scanning.
> + * We will use all the (page + OOB).
> + */
> + layout->eccbytes = 0;
> + layout->oobavail = 0;
> +
> + mtd->oobavail = mtd->oobsize;
> +
> + /* Set up swap block-mark, must be set before the mil_set_geometry() */
> + if (GPMI_IS_MX23(this))
> + this->swap_block_mark = false;
> + else
> + this->swap_block_mark = true;
> +
> + /* Set up the medium geometry */
> + error = mil_set_geometry(this);
> + if (error)
> + return error;
> +
> + /* NAND boot init, depends on the mil_set_geometry(). */
> + return nand_boot_init(this);
> +}
> +
> +static int gpmi_scan_bbt(struct mtd_info *mtd)
> +{
> + struct nand_chip *nand = mtd->priv;
> + struct gpmi_nand_data *this = nand->priv;
> + int error;
> +
> + /* Prepare for the BBT scan. */
> + error = mil_pre_bbt_scan(this);
> + if (error)
> + return error;
> +
> + /* use the default BBT implementation */
> + return nand_default_bbt(mtd);
> +}
> +
> +static const char *cmd_parse[] = {"cmdlinepart", NULL};
> +static int __devinit mil_partitions_init(struct gpmi_nand_data *this)
> +{
> + struct gpmi_nand_platform_data *pdata = this->pdata;
> + struct mil *mil = &this->mil;
> + struct mtd_info *mtd = &mil->mtd;
> +
> + /* use the command line for simple partitions layout */
> + mil->partition_count = parse_mtd_partitions(mtd, cmd_parse,
> + &mil->partitions, 0);
> + if (mil->partition_count)
> + return mtd_device_register(mtd, mil->partitions,
> + mil->partition_count);
> +
> + /* The complicated partitions layout uses this. */
> + if (pdata->partitions && pdata->partition_count > 0)
> + return mtd_device_register(mtd, pdata->partitions,
> + pdata->partition_count);
> + return mtd_device_register(mtd, NULL, 0);
> +}
> +
> +static void mil_partitions_exit(struct gpmi_nand_data *this)
> +{
> + struct mil *mil = &this->mil;
> + struct mtd_info *mtd = &mil->mtd;
> +
> + mtd_device_unregister(mtd);
> + kfree(mil->partitions);
> + mil->partition_count = 0;
> +}
> +
> +/* Initializes the MTD Interface Layer */
> +static int __devinit gpmi_nfc_mil_init(struct gpmi_nand_data *this)
> +{
> + struct gpmi_nand_platform_data *pdata = this->pdata;
> + struct mil *mil = &this->mil;
> + struct mtd_info *mtd = &mil->mtd;
> + struct nand_chip *nand = &mil->nand;
> + int error;
> +
> + /* Initialize data */
> + mil->current_chip = -1;
> +
> + /* Initialize the MTD data structures */
> + mtd->priv = nand;
> + mtd->name = "gpmi-nand";
> + mtd->owner = THIS_MODULE;
> + nand->priv = this;
> +
> + /* Controls */
> + nand->select_chip = gpmi_select_chip;
> + nand->cmd_ctrl = gpmi_cmd_ctrl;
> + nand->dev_ready = gpmi_dev_ready;
> +
> + /*
> + * Low-level I/O :
> + * We don't support a 16-bit NAND Flash bus,
> + * so we don't implement read_word.
> + */
> + nand->read_byte = gpmi_read_byte;
> + nand->read_buf = gpmi_read_buf;
> + nand->write_buf = gpmi_write_buf;
> +
> + /* ECC-aware I/O */
> + nand->ecc.read_page = gpmi_ecc_read_page;
> + nand->ecc.write_page = gpmi_ecc_write_page;
> +
> + /* High-level I/O */
> + nand->ecc.read_oob = gpmi_ecc_read_oob;
> +
> + /* Bad Block Management */
> + nand->scan_bbt = gpmi_scan_bbt;
> + nand->badblock_pattern = &gpmi_bbt_descr;
> + nand->block_markbad = gpmi_block_markbad;
> +
> + /* Disallow partial page writes */
> + nand->options |= NAND_NO_SUBPAGE_WRITE;
> +
> + /*
> + * Tell the NAND Flash MTD system that we'll be handling ECC with our
> + * own hardware. It turns out that we still have to fill in the ECC size
> + * because the MTD code will divide by it -- even though it doesn't
> + * actually care.
> + */
> + nand->ecc.mode = NAND_ECC_HW;
> + nand->ecc.size = 1;
> +
> + /* use our layout */
> + nand->ecc.layout = &mil->oob_layout;
> +
> + /* Allocate a temporary DMA buffer for reading ID in the nand_scan() */
> + this->bch_geometry.payload_size_in_bytes = 1024;
> + this->bch_geometry.auxiliary_size_in_bytes = 128;
> + error = mil_alloc_dma_buffer(this);
> + if (error)
> + goto exit_dma_allocation;
> +
> + printk(KERN_INFO "GPMI-NAND : Scanning for NAND Flash chips...\n");
> + error = nand_scan(mtd, pdata->max_chip_count);
> + if (error) {
> + pr_info("Chip scan failed\n");
> + goto exit_nand_scan;
> + }
> +
> + /* Construct partitions as necessary. */
> + error = mil_partitions_init(this);
> + if (error)
> + goto exit_partitions;
> + return 0;
> +
> +exit_partitions:
> + nand_release(&mil->mtd);
> +exit_nand_scan:
> + mil_free_dma_buffer(this);
> +exit_dma_allocation:
> + return error;
> +}
> +
> +void gpmi_nand_mil_exit(struct gpmi_nand_data *this)
> +{
> + struct mil *mil = &this->mil;
> +
> + mil_partitions_exit(this);
> + nand_release(&mil->mtd);
> + mil_free_dma_buffer(this);
> +}
> +
> +static int __devinit gpmi_nand_probe(struct platform_device *pdev)
> +{
> + struct gpmi_nand_platform_data *pdata = pdev->dev.platform_data;
> + struct gpmi_nand_data *this;
> + int error;
> +
> + this = kzalloc(sizeof(*this), GFP_KERNEL);
> + if (!this) {
> + pr_info("Failed to allocate per-device memory\n");
> + return -ENOMEM;
> + }
> +
> + /* Set up our data structures. */
> + platform_set_drvdata(pdev, this);
> + this->pdev = pdev;
> + this->dev = &pdev->dev;
> + this->pdata = pdata;
> +
> + /* setup the platform */
> + if (pdata->platform_init) {
> + error = pdata->platform_init();
> + if (error)
> + goto platform_init_error;
> + }
> +
> + /* Acquire the resources we need. */
> + error = acquire_resources(this);
> + if (error)
> + goto exit_acquire_resources;
> +
> + /* Set up the GPMI/BCH hardware. */
> + error = init_hardware(this);
> + if (error)
> + goto exit_nfc_init;
> +
> + /* Initialize the MTD Interface Layer. */
> + error = gpmi_nfc_mil_init(this);
> + if (error)
> + goto exit_mil_init;
> +
> + return 0;
> +
> +exit_mil_init:
> +exit_nfc_init:
> + release_resources(this);
> +platform_init_error:
> +exit_acquire_resources:
> + platform_set_drvdata(pdev, NULL);
> + kfree(this);
> + return error;
> +}
> +
> +static int __exit gpmi_nand_remove(struct platform_device *pdev)
> +{
> + struct gpmi_nand_data *this = platform_get_drvdata(pdev);
> +
> + gpmi_nand_mil_exit(this);
> + release_resources(this);
> + platform_set_drvdata(pdev, NULL);
> + kfree(this);
> + return 0;
> +}
> +
> +static const struct platform_device_id gpmi_ids[] = {
> + {
> + .name = "imx23-gpmi-nand",
> + .driver_data = IS_MX23,
> + }, {
> + .name = "imx28-gpmi-nand",
> + .driver_data = IS_MX28,
> + }, {},
> +};
> +
> +/* This structure represents this driver to the platform management
> system. */ +static struct platform_driver gpmi_nand_driver = {
> + .driver = {
> + .name = "gpmi-nand",
> + },
> + .probe = gpmi_nand_probe,
> + .remove = __exit_p(gpmi_nand_remove),
> + .id_table = gpmi_ids,
> +};
> +
> +static int __init gpmi_nand_init(void)
> +{
> + int err;
> +
> + err = platform_driver_register(&gpmi_nand_driver);
> + if (err == 0)
> + printk(KERN_INFO "GPMI NAND driver registered. (IMX)\n");
> + else
> + pr_err("i.MX GPMI NAND driver registration failed\n");
> + return err;
> +}
> +
> +static void __exit gpmi_nand_exit(void)
> +{
> + platform_driver_unregister(&gpmi_nand_driver);
> +}
> +
> +module_init(gpmi_nand_init);
> +module_exit(gpmi_nand_exit);
> +
> +MODULE_AUTHOR("Freescale Semiconductor, Inc.");
> +MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
> +MODULE_LICENSE("GPL");
> diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
> b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h new file mode 100644
> index 0000000..daab719
> --- /dev/null
> +++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
> @@ -0,0 +1,377 @@
> +/*
> + * Freescale GPMI NAND Flash Driver
> + *
> + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
> + * Copyright (C) 2008 Embedded Alley Solutions, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +#ifndef __DRIVERS_MTD_NAND_GPMI_NAND_H
> +#define __DRIVERS_MTD_NAND_GPMI_NAND_H
> +
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/module.h>
> +#include <linux/io.h>
> +#include <linux/interrupt.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/slab.h>
> +#include <linux/platform_device.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/nand.h>
> +#include <linux/mtd/partitions.h>
> +#include <linux/mtd/concat.h>
> +#include <linux/dmaengine.h>
> +#include <asm/sizes.h>
> +
> +#include <mach/common.h>
> +#include <mach/dma.h>
> +#include <linux/mtd/gpmi-nand.h>
> +#include <mach/system.h>
> +#include <mach/clock.h>
> +
> +/* The collection of resources the driver needs. */
> +struct resources {
> + void *gpmi_regs;
> + void *bch_regs;
> + unsigned int bch_low_interrupt;
> + unsigned int bch_high_interrupt;
> + unsigned int dma_low_channel;
> + unsigned int dma_high_channel;
> + struct clk *clock;
> +};
> +
> +/**
> + * struct mil - State for the MTD Interface Layer.
> + *
> + * @nand: The NAND Flash MTD data structure that
> represents + * the NAND Flash medium.
> + * @mtd: The MTD data structure that represents the
> NAND + * Flash medium.
> + * @oob_layout: A structure that describes how bytes are laid
> out + * in the OOB.
> + * @partitions: A pointer to a set of partitions.
> + * @partition_count: The number of partitions.
> + * @current_chip: The chip currently selected by the NAND Fash
> MTD + * code. A negative value indicates that no
> chip is + * selected.
> + * @command_length: The length of the command that appears in the
> + * command buffer (see cmd_virt, below).
> + * @ignore_bad_block_marks: Indicates we are ignoring bad block marks.
> + * @upper_buf: The buffer passed from upper layer.
> + * @upper_len: The buffer len passed from upper layer.
> + * @direct_dma_map_ok: Is the direct DMA map is good for the
> upper_buf? + * @cmd_sgl/cmd_buffer: For NAND command.
> + * @data_sgl/data_buffer_dma:For NAND DATA ops.
> + * @page_buffer_virt: A pointer to a DMA-coherent buffer we use for
> + * reading and writing pages. This buffer
> includes + * space for both the payload data and
> the auxiliary + * data (including status bytes,
> but not syndrome + * bytes).
> + * @page_buffer_phys: The physical address for the page_buffer_virt
> + * buffer.
> + * @page_buffer_size: The size of the page buffer.
> + * @payload_virt: A pointer to a location in the page buffer
> used + * for payload bytes. The size of this
> buffer is + * determined by struct bch_geometry.
> + * @payload_phys: The physical address for payload_virt.
> + * @auxiliary_virt: A pointer to a location in the page buffer
> used + * for auxiliary bytes. The size of this
> buffer is + * determined by struct bch_geometry.
> + * @auxiliary_phys: The physical address for auxiliary_virt.
> + */
> +struct mil {
> + /* MTD Data Structures */
> + struct nand_chip nand;
> + struct mtd_info mtd;
> + struct nand_ecclayout oob_layout;
> +
> + /* Partitions*/
> + struct mtd_partition *partitions;
> + unsigned int partition_count;
> +
> + /* General-use Variables */
> + int current_chip;
> + unsigned int command_length;
> + int ignore_bad_block_marks;
> +
> + /* from upper layer */
> + uint8_t *upper_buf;
> + int upper_len;
> +
> + /* DMA */
> + bool direct_dma_map_ok;
> +
> + struct scatterlist cmd_sgl;
> + char *cmd_buffer;
> +
> + struct scatterlist data_sgl;
> + char *data_buffer_dma;
> +
> + void *page_buffer_virt;
> + dma_addr_t page_buffer_phys;
> + unsigned int page_buffer_size;
> +
> + void *payload_virt;
> + dma_addr_t payload_phys;
> +
> + void *auxiliary_virt;
> + dma_addr_t auxiliary_phys;
> +};
> +
> +/**
> + * struct bch_geometry - NFC geometry description.
> + *
> + * This structure describes the NFC's view of the medium geometry.
> + *
> + * @ecc_algorithm: The human-readable name of the ECC algorithm
> + * (e.g., "Reed-Solomon" or "BCH").
> + * @ecc_strength: A number that describes the strength of the
> ECC + * algorithm.
> + * @page_size_in_bytes: The size, in bytes, of a physical page,
> including + * both data and OOB.
> + * @metadata_size_in_bytes: The size, in bytes, of the metadata.
> + * @ecc_chunk_size_in_bytes: The size, in bytes, of a single ECC chunk.
> Note + * the first chunk in the page includes
> both data and + * metadata, so it's a bit
> larger than this value. + * @ecc_chunk_count: The number of ECC
> chunks in the page, + * @payload_size_in_bytes: The size, in bytes, of
> the payload buffer. + * @auxiliary_size_in_bytes: The size, in bytes, of
> the auxiliary buffer. + * @auxiliary_status_offset: The offset into the
> auxiliary buffer at which + * the ECC status
> appears.
> + * @block_mark_byte_offset: The byte offset in the ECC-based page view
> at + * which the underlying physical block mark
> appears. + * @block_mark_bit_offset: The bit offset into the ECC-based
> page view at + * which the underlying physical
> block mark appears. + */
> +struct bch_geometry {
> + char *ecc_algorithm;
> + unsigned int ecc_strength;
> + unsigned int page_size_in_bytes;
> + unsigned int metadata_size_in_bytes;
> + unsigned int ecc_chunk_size_in_bytes;
> + unsigned int ecc_chunk_count;
> + unsigned int payload_size_in_bytes;
> + unsigned int auxiliary_size_in_bytes;
> + unsigned int auxiliary_status_offset;
> + unsigned int block_mark_byte_offset;
> + unsigned int block_mark_bit_offset;
> +};
> +
> +/**
> + * struct boot_rom_geometry - Boot ROM geometry description.
> + *
> + * @stride_size_in_pages: The size of a boot block stride, in
> pages. + * @search_area_stride_exponent: The logarithm to base 2 of the
> size of a + * search area in boot block
> strides. + */
> +struct boot_rom_geometry {
> + unsigned int stride_size_in_pages;
> + unsigned int search_area_stride_exponent;
> +};
> +
> +/* DMA operations types */
> +enum dma_ops_type {
> + DMA_FOR_COMMAND = 1,
> + DMA_FOR_READ_DATA,
> + DMA_FOR_WRITE_DATA,
> + DMA_FOR_READ_ECC_PAGE,
> + DMA_FOR_WRITE_ECC_PAGE
> +};
> +
> +/**
> + * This structure contains the fundamental timing attributes for NAND.
> + *
> + * @data_setup_in_ns: The data setup time, in nanoseconds. Usually
> the + * maximum of tDS and tWP. A negative
> value + * indicates this characteristic isn't
> known. + * @data_hold_in_ns: The data hold time, in nanoseconds.
> Usually the + * maximum of tDH, tWH and tREH. A
> negative value + * indicates this
> characteristic isn't known. + * @address_setup_in_ns: The address
> setup time, in nanoseconds. Usually + * the
> maximum of tCLS, tCS and tALS. A negative + *
> value indicates this characteristic isn't known. + *
> @gpmi_sample_delay_in_ns: A GPMI-specific timing parameter. A negative
> value + * indicates this characteristic isn't
> known. + * @tREA_in_ns: tREA, in nanoseconds, from the data
> sheet. A + * negative value indicates this
> characteristic isn't + * known.
> + * @tRLOH_in_ns: tRLOH, in nanoseconds, from the data sheet.
> A + * negative value indicates this
> characteristic isn't + * known.
> + * @tRHOH_in_ns: tRHOH, in nanoseconds, from the data sheet.
> A + * negative value indicates this
> characteristic isn't + * known.
> + */
> +struct nand_timing {
> + int8_t data_setup_in_ns;
> + int8_t data_hold_in_ns;
> + int8_t address_setup_in_ns;
> + int8_t gpmi_sample_delay_in_ns;
> + int8_t tREA_in_ns;
> + int8_t tRLOH_in_ns;
> + int8_t tRHOH_in_ns;
> +};
> +
> +struct gpmi_nand_data {
> + /* System Interface */
> + struct device *dev;
> + struct platform_device *pdev;
> + struct gpmi_nand_platform_data *pdata;
> +
> + /* Resources */
> + struct resources resources;
> +
> + /* Flash Hardware */
> + struct nand_timing timing;
> +
> + /* BCH */
> + struct bch_geometry bch_geometry;
> + struct completion bch_done;
> +
> + /* NAND Boot issue */
> + bool swap_block_mark;
> + struct boot_rom_geometry rom_geometry;
> +
> + /* MTD Interface Layer */
> + struct mil mil;
> +
> + /* DMA channels */
> +#define DMA_CHANS 8
> + struct dma_chan *dma_chans[DMA_CHANS];
> + struct mxs_dma_data dma_data;
> + enum dma_ops_type last_dma_type;
> + enum dma_ops_type dma_type;
> + struct completion dma_done;
> +
> + /* private */
> + void *private;
> +};
> +
> +/**
> + * struct gpmi_nfc_hardware_timing - GPMI hardware timing parameters.
> + *
> + * This structure contains timing information expressed in a form directly
> + * usable by the GPMI hardware.
> + *
> + * @data_setup_in_cycles: The data setup time, in cycles.
> + * @data_hold_in_cycles: The data hold time, in cycles.
> + * @address_setup_in_cycles: The address setup time, in cycles.
> + * @use_half_periods: Indicates the clock is running slowly, so
> the + * NFC DLL should use half-periods.
> + * @sample_delay_factor: The sample delay factor.
> + */
> +struct gpmi_nfc_hardware_timing {
> + uint8_t data_setup_in_cycles;
> + uint8_t data_hold_in_cycles;
> + uint8_t address_setup_in_cycles;
> + bool use_half_periods;
> + uint8_t sample_delay_factor;
> +};
> +
> +/**
> + * struct timing_threshod - timing threshold
> + *
> + * @max_data_setup_cycles: The maximum number of data setup cycles
> that + * can be expressed in the hardware. +
> * @internal_data_setup_in_ns: The time, in ns, that the NFC hardware
> requires + * for data read internal setup.
> In the Reference + * Manual, see the chapter
> "High-Speed NAND + * Timing" for more
> details.
> + * @max_sample_delay_factor: The maximum sample delay factor that can
> be + * expressed in the hardware.
> + * @max_dll_clock_period_in_ns: The maximum period of the GPMI clock that
> the + * sample delay DLL hardware can
> possibly work + * with (the DLL is unusable
> with longer periods). + * If the full-cycle
> period is greater than HALF + * this value,
> the DLL must be configured to use + *
> half-periods.
> + * @max_dll_delay_in_ns: The maximum amount of delay, in ns, that
> the + * DLL can implement.
> + * @clock_frequency_in_hz: The clock frequency, in Hz, during the
> current + * I/O transaction. If no I/O
> transaction is in + * progress, this is the
> clock frequency during + * the most recent
> I/O transaction. + */
> +struct timing_threshod {
> + const unsigned int max_chip_count;
> + const unsigned int max_data_setup_cycles;
> + const unsigned int internal_data_setup_in_ns;
> + const unsigned int max_sample_delay_factor;
> + const unsigned int max_dll_clock_period_in_ns;
> + const unsigned int max_dll_delay_in_ns;
> + unsigned long clock_frequency_in_hz;
> +
> +};
> +
> +/* Common Services */
> +extern int common_nfc_set_geometry(struct gpmi_nand_data *);
> +extern struct dma_chan *get_dma_chan(struct gpmi_nand_data *);
> +extern void prepare_data_dma(struct gpmi_nand_data *,
> + enum dma_data_direction dr);
> +extern int start_dma_without_bch_irq(struct gpmi_nand_data *,
> + struct dma_async_tx_descriptor *);
> +extern int start_dma_with_bch_irq(struct gpmi_nand_data *,
> + struct dma_async_tx_descriptor *);
> +
> +/* GPMI-NAND helper function library */
> +extern int gpmi_init(struct gpmi_nand_data *);
> +extern void gpmi_clear_bch(struct gpmi_nand_data *);
> +extern void gpmi_show_regs(struct gpmi_nand_data *);
> +extern int bch_set_geometry(struct gpmi_nand_data *);
> +extern int gpmi_is_ready(struct gpmi_nand_data *, unsigned chip);
> +extern int gpmi_send_command(struct gpmi_nand_data *);
> +extern void gpmi_begin(struct gpmi_nand_data *);
> +extern void gpmi_end(struct gpmi_nand_data *);
> +extern int gpmi_read_data(struct gpmi_nand_data *);
> +extern int gpmi_send_data(struct gpmi_nand_data *);
> +extern int gpmi_send_page(struct gpmi_nand_data *,
> + dma_addr_t payload, dma_addr_t auxiliary);
> +extern int gpmi_read_page(struct gpmi_nand_data *,
> + dma_addr_t payload, dma_addr_t auxiliary);
> +
> +/* ONFI or TOGGLE nand */
> +bool is_ddr_nand(struct gpmi_nand_data *);
> +
> +/* for log */
> +extern int gpmi_debug;
Why this extern ?
> +#define GPMI_DEBUG_INIT 0x0001
> +#define GPMI_DEBUG_READ 0x0002
> +#define GPMI_DEBUG_WRITE 0x0004
> +#define GPMI_DEBUG_ECC_READ 0x0008
> +#define GPMI_DEBUG_ECC_WRITE 0x0010
> +#define GPMI_DEBUG_CRAZY 0x0020
> +
> +#ifdef pr_fmt
> +#undef pr_fmt
> +#endif
> +
> +#define pr_fmt(fmt) "[ %s : %.3d ] " fmt, __func__, __LINE__
> +
> +#define logio(level) \
> + do { \
> + if (gpmi_debug & level) \
> + pr_info("\n"); \
> + } while (0)
Do you really need this ?
> +
> +/* BCH : Status Block Completion Codes */
> +#define STATUS_GOOD 0x00
> +#define STATUS_ERASED 0xff
> +#define STATUS_UNCORRECTABLE 0xfe
> +
> +/* Use the platform_id to distinguish different Archs. */
> +#define IS_MX23 0x1
> +#define IS_MX28 0x2
> +#define GPMI_IS_MX23(x) ((x)->pdev->id_entry->driver_data == IS_MX23)
> +#define GPMI_IS_MX28(x) ((x)->pdev->id_entry->driver_data == IS_MX28)
> +#endif
Cheers
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