[PATCH] mtd: nand: davinci: Add cpufreq support

Ben Gardiner bengardiner at nanometrics.ca
Tue Aug 2 12:13:11 EDT 2011


Hi Sekhar,

On Tue, Aug 2, 2011 at 12:00 PM, Nori, Sekhar <nsekhar at ti.com> wrote:
> Hi Ben,
>
> On Tue, Aug 02, 2011 at 18:32:39, Ben Gardiner wrote:
>> Hi Sudhakar,
>>
>> On Thu, Jul 21, 2011 at 5:39 AM, Rajashekhara, Sudhakar
>> <sudhakar.raj at ti.com> wrote:
>> > This patch adds cpufreq support for NAND driver. During cpufreq
>> > transition, 'davinci_aemif_setup_timing()' function will be called
>> > to reconfigure that AEMIF timings for the new frequency.
>>
>> I can see that this will work fine for dacinci_nand -- and it is a
>> welcomed feature also -- thank you for the effort to push this
>> upstream.
>>
>> Seeing this support added directly to davinci_nand driver made me
>> think -- now this driver has another reference to platform-specific
>> functions in arch/arm/mach-davinci/aemif.c. Recently the c6x project
>> pushed a fix to remove references to a platform specific include. Not
>> that you are re-introducing this include but in a more general sense:
>> perhaps the features/functions of the AEMIF _bus_ should be removed
>> from the davinci_nand driver?
>
> Good point! arch/arm/mach-davinci/aemif.c should be moved to drivers/
> Because AEMIF is present on C6x and OMAP architectures as well and
> not limited to DaVinci.

Thanks, glad to help.

> I am not sure if there are any existing "memory interface" drivers.
> Moving to drivers/misc/ may be a good point to start.
>
> Making AEMIF a new bus type is an interesting idea as well.

I don't really know what the best fit is; but I imagine a bus type
driver is suitable since it best reflects the actual hierarchy of
devices and hence should yield the best runtime power management...

Whether or not it is a bus type driver, I think the AEMIF driver when
migrated should ideally be taking the timings and other AEMIF
configuration parameters (bus width, extended wait, stobe mode) as
platform data instead of the direct register writes from
board-da850-evm.c. This suggests one driver instance per chip-select.

Note that I am not volunteering to do the AEMIF driver development
here :) Although I do have some patches in development that would be
affected by the merge of such a feature.

Best Regards,
Ben Gardiner

---
Nanometrics Inc.
http://www.nanometrics.ca



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