[PATCH v5 2/5] omap3: nand: prefetch in irq mode support
Tony Lindgren
tony at atomide.com
Tue Sep 28 18:29:33 EDT 2010
* Sukumar Ghorai <s-ghorai at ti.com> [100927 06:30]:
> This patch enable prefetch-irq mode for NAND.
> --- a/drivers/mtd/nand/Kconfig
> +++ b/drivers/mtd/nand/Kconfig
> @@ -112,6 +112,9 @@ config MTD_NAND_OMAP_PREFETCH
> help
> The NAND device can be accessed for Read/Write using GPMC PREFETCH engine
> to improve the performance.
> + GPMC PREFETCH can be configured eigther in MPU interrupt mode or in DMA
> + interrupt mode. If not selected any of them prefetch will be used in
> + polling mode.
>
> config MTD_NAND_OMAP_PREFETCH_DMA
> depends on MTD_NAND_OMAP_PREFETCH
> @@ -120,7 +123,16 @@ config MTD_NAND_OMAP_PREFETCH_DMA
> help
> The GPMC PREFETCH engine can be configured eigther in MPU interrupt mode
> or in DMA interrupt mode.
> - Say y for DMA mode or MPU mode will be used
> + Say y for DMA mode
> +
> +config MTD_NAND_OMAP_PREFETCH_IRQ
> + depends on MTD_NAND_OMAP_PREFETCH && !MTD_NAND_OMAP_PREFETCH_DMA
> + bool "IRQ mode"
> + default n
> + help
> + The GPMC PREFETCH engine can be configured eigther in MPU interrupt mode
> + or in DMA interrupt mode.
> + Say y for IRQ mode
>
> config MTD_NAND_IDS
> tristate
The configuration to use the prefetch IRQ should be passed in the platform_data
from the board-*.c files. What if you want to to boot a distro kernel on
omap2, 3 and 4 and only some of the boards can use the prefetch interrupt?
Tony
More information about the linux-mtd
mailing list