[Help] SST39VF6401B Support

[yidong zhang]

hi

>Just to apply the patch and see what happens. The most important part
>of this patch is:
>
>Please refer to the data sheets Table 6:
>39VF6401B data sheet http://www.sst.com/downloads/datasheet/S71288.pdf
>39VF6401 data sheet http://www.sst.com/downloads/datasheet/S71223-03.pdf
>
>The difference in the 6th bus write cycle. 39VF6401B uses 0x50 and
>39VF6401 uses 0x30.
>
>Without this even if the chip gets detected you cannot write to it.
>
>I haven't look at this since my try to submit this patch, so I don't
>know how to fix the stuff for cfi_probe.

 Recently, i use the 39VF6401B flash, and i apply your patch. The chip
can be get detected. But when i erase one sector, it use 0x30 to erase
one block. The size of a block is much bigger than a sector as we
know.So i use the JEDEC probe to detect the flash. And i make the
erase size to one block-erase size. And it works fine. So i think
the  chip(39VF6401B)  should not be CFI compliant, maybe the  JEDEC
mode is better.

Regards,
zhang