[PATCH v3 2/2] davinci: Platform support for OMAP-L137/AM17x NOR flash driver

[Sergei Shtylyov]

Hello.

On 19-11-2010 12:54, Savinay Dharmappa wrote:

> From: Aleksey Makarov <amakarov at ru.mvista.com>

> Adds platform support for OMAP-L137/AM17x NOR flash driver.

> Also, configures chip select 3 to control NOR flash's upper
> address lines.

> Signed-off-by: Aleksey Makarov <amakarov at ru.mvista.com>
> Signed-off-by: Sergei Shtylyov <sshtylyov at ru.mvista.com>
> Signed-off-by: Savinay Dharmappa <savinay.dharmappa at ti.com>
[...]

> diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
> index b52a3a1..c807c1b 100644
> --- a/arch/arm/mach-davinci/board-da830-evm.c
> +++ b/arch/arm/mach-davinci/board-da830-evm.c
> @@ -20,6 +20,8 @@
>   #include<linux/i2c/at24.h>
>   #include<linux/mtd/mtd.h>
>   #include<linux/mtd/partitions.h>
> +#include<linux/mtd/latch-addr-flash.h>
> +#include<linux/clk.h>
>
>   #include<asm/mach-types.h>
>   #include<asm/mach/arch.h>
> @@ -429,6 +431,220 @@ static inline void da830_evm_init_nand(int mux_mode)
>   static inline void da830_evm_init_nand(int mux_mode) { }
>   #endif
>
> +#ifdef CONFIG_DA830_UI_NOR
> +/*
> + * Number of lines going to the NOR flash that are latched using
> + * AEMIF address lines B_EMIF_BA0-B_EMIF_A12 on CS2.

    You still left the words about latching the low address bytes...

> + */
> +#define NOR_WINDOW_SIZE_LOG2     15
> +#define NOR_WINDOW_SIZE         (1<<  NOR_WINDOW_SIZE_LOG2)
> +
> +static struct {
> +	struct clk *clk;
> +	struct {
> +		void __iomem *addr;
> +	} latch, aemif;

    Don't need a structure here anymore.

> +static void da830_evm_nor_set_window(unsigned long offset, void *data)
> +{
> +	/*
> +	 * CS2 and CS3 address lines are used to address NOR flash. Address
> +	 * line

    Only "lines".

> A0-A14 going to

    Rather "from"...

> the NOR flash are connected to AEMIF address
> +	 * lines B_EMIF_BA0-B_EMIF_A12 on CS2. Address lines A15-A23 of the
> +	 * NOR flash are connected to AEMIF address lines B_EMIF_A0-B_EMIF_A6
> +	 * on CS3.

    They are not connected but latched from B_EMIF_A0-B_EMIF_A6 on CS3.

> +	/* Setup AEMIF -- timings, etc. */
> +
> +	/* Set maximum wait cycles */
> +	davinci_aemif_setup_timing(&da830_evm_norflash_timing,
> +						da830_evm_nor.aemif.addr, cs);
> +
> +	davinci_aemif_setup_timing(&da830_evm_norflash_timing,
> +					da830_evm_nor.aemif.addr, cs + 1);
> +
> +	/* Setup the window to access the latch */
> +	res = request_mem_region(DA8XX_AEMIF_CS3_BASE, PAGE_SIZE,
> +				"DA830 UI NOR address latch");
> +	if (res == NULL) {
> +		pr_err("%s: could not request address latch region\n",
> +			__func__);
> +		goto err_aemif_ioremap;
> +	}
> +
> +	da830_evm_nor.latch.addr =
> +		ioremap_nocache(DA8XX_AEMIF_CS3_BASE, PAGE_SIZE);
> +	if (da830_evm_nor.latch.addr == NULL) {
> +		pr_err("%s: could not remap address latch region\n", __func__);
> +		goto err_latch_region;
> +	}
> +	return 0;
> +
> +err_latch_region:
> +	release_mem_region(DA8XX_AEMIF_CS3_BASE, PAGE_SIZE);
> +
> +err_aemif_ioremap:
> +	iounmap(da830_evm_nor.aemif.addr);
> +
> +err_aemif_region:
> +	release_mem_region(DA8XX_AEMIF_CTL_BASE, SZ_32K);
> +
> +err_clk:
> +	clk_disable(da830_evm_nor.clk);
> +	clk_put(da830_evm_nor.clk);
> +
> +	return -EBUSY;

    You should return -ENOMEM for ioremap() failures...

WBR, Sergei