Enabling D-cache for OneNAND bufferram

[Jamie Lokier]

Joakim Tjernlund wrote:
> ioremap returns a *second* mapping to the same RAM so you first
> original mapping should be fine.

Note that having two mappings with different attributes to the same
address is architecturally prohibited on (at least) some ARMs.
I.e. it may not behave correctly.

Then again, dma_alloc_coherent has to do it.  But be careful!
Remember to flush the cache before unmapping the cached area
if the driver has an exit function.

-- Jamie