Enabling D-cache for OneNAND bufferram
Leo Barnes
leo.barnes at algotrim.com
Wed Mar 24 09:21:35 EDT 2010
Hello!
I am currently writing a piece of software that takes advantage of the
fact that OneNAND supports read-while-loading. What I am doing is trying
to achieve higher efficiency when decoding data from the OneNAND by
decoding data that is available in the OneNAND bufferram directly
instead of copying it to normal RAM and decoding there. So far, I have
gotten quite poor results due to the fact that the bufferrams are not
cached (for good reason since it is Device memory). My software will be
used on ARM devices of different types, with my testrigs being a Nokia
N810 and a N900.
I have exclusive access to the OneNAND chip, and as such know exactly
what information is stored in the bufferrams at all times. If I could
only enable the D-cache for the bufferrams, I could therefore make sure
to invalidate the cache whenever I reprogram the OneNAND chip.
From what I have read so far, it seems that the only way to enable
cacheing of the bufferrams would be to somehow change how the memory
attributes for the memory region in the MMU. I have however not found
any easy way of doing this. Any tips? I dont really have very much
experience when it comes to how the MMU works.
Best regards,
Leo
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