[PATCH 5/5] [MTD/denali] remove set_ecc_config This function only need to set ECC_CORRECTION reg so remove it and set this reg in probe function. For denali nand controller only support 15bits and 8bits ecc correction on MRST, here use 15bits ecc correction for MLC NAND and 8bits ecc correction for SLC NAND.

[Chuanxiao Dong]

Signed-off-by: Chuanxiao Dong <chuanxiao.dong at intel.com>
---
 drivers/mtd/nand/denali.c |   44 ++---------------------------------------=
---
 1 files changed, 2 insertions(+), 42 deletions(-)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 1555921..d143b0b 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -354,46 +354,6 @@ static void nand_onfi_timing_set(struct denali_nand_in=
fo *denali,
 	denali_write32(cs_cnt, denali->flash_reg + CS_SETUP_CNT);
 }
=20
-/* configures the initial ECC settings for the controller */
-static void set_ecc_config(struct denali_nand_info *denali)
-{
-#if SUPPORT_8BITECC
-	if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) < 4096) ||
-		(ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) <=3D 128))
-		denali_write32(8, denali->flash_reg + ECC_CORRECTION);
-#endif
-
-	if ((ioread32(denali->flash_reg + ECC_CORRECTION) &
-				ECC_CORRECTION__VALUE) =3D=3D 1) {
-		denali->dev_info.wECCBytesPerSector =3D 4;
-		denali->dev_info.wECCBytesPerSector *=3D
-			denali->dev_info.wDevicesConnected;
-		denali->dev_info.wNumPageSpareFlag =3D
-			denali->dev_info.wPageSpareSize -
-			denali->dev_info.wPageDataSize /
-			(ECC_SECTOR_SIZE * denali->dev_info.wDevicesConnected) *
-			denali->dev_info.wECCBytesPerSector
-			- denali->dev_info.wSpareSkipBytes;
-	} else {
-		denali->dev_info.wECCBytesPerSector =3D
-			(ioread32(denali->flash_reg + ECC_CORRECTION) &
-			ECC_CORRECTION__VALUE) * 13 / 8;
-		if ((denali->dev_info.wECCBytesPerSector) % 2 =3D=3D 0)
-			denali->dev_info.wECCBytesPerSector +=3D 2;
-		else
-			denali->dev_info.wECCBytesPerSector +=3D 1;
-
-		denali->dev_info.wECCBytesPerSector *=3D
-			denali->dev_info.wDevicesConnected;
-		denali->dev_info.wNumPageSpareFlag =3D
-			denali->dev_info.wPageSpareSize -
-			denali->dev_info.wPageDataSize /
-			(ECC_SECTOR_SIZE * denali->dev_info.wDevicesConnected) *
-			denali->dev_info.wECCBytesPerSector
-			- denali->dev_info.wSpareSkipBytes;
-	}
-}
-
 /* queries the NAND device to see what ONFI modes it supports. */
 static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
 {
@@ -900,8 +860,6 @@ static uint16_t denali_nand_timing_set(struct denali_na=
nd_info *denali)
 	denali->dev_info.nBitsInBlockDataSize =3D
 		ilog2(denali->dev_info.wBlockDataSize);
=20
-	set_ecc_config(denali);
-
 	no_of_planes =3D ioread32(denali->flash_reg + NUMBER_OF_PLANES) &
 		NUMBER_OF_PLANES__VALUE;
=20
@@ -2075,9 +2033,11 @@ static int denali_pci_probe(struct pci_dev *dev, con=
st struct pci_device_id *id)
 	if (denali->dev_info.MLCDevice) {
 		denali->nand.ecc.layout =3D &nand_oob_mlc_14bit;
 		denali->nand.ecc.bytes =3D ECC_BYTES_MLC;
+		denali_write32(15, denali->flash_reg + ECC_CORRECTION);
 	} else { /* SLC */
 		denali->nand.ecc.layout =3D &nand_oob_slc;
 		denali->nand.ecc.bytes =3D ECC_BYTES_SLC;
+		denali_write32(8, denali->flash_reg + ECC_CORRECTION);
 	}
=20
 	/* These functions are required by the NAND core framework, otherwise,
--=20
1.6.6.1


--_002_5D8008F58939784290FAB48F549751981D09B718B7shsmsx502ccrc_
Content-Type: application/octet-stream;
	name="0005-MTD-denali-remove-set_ecc_config.patch"
Content-Description: 0005-MTD-denali-remove-set_ecc_config.patch
Content-Disposition: attachment;
	filename="0005-MTD-denali-remove-set_ecc_config.patch"; size=3545;
	creation-date="Mon, 21 Jun 2010 18:56:23 GMT";
	modification-date="Mon, 21 Jun 2010 19:11:43 GMT"
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--_002_5D8008F58939784290FAB48F549751981D09B718B7shsmsx502ccrc_--