New NAND Help

[Paulraj, Sandeep]

> >
> <snip>
> >
> > Looking at the drivers/mtd/nand section of the tree I have added the new
> > chip ID to nand_ids.c  There already appears to be support for 4096 page
> > sizes and 512K block sizes.  What else would I need to check to ensure
> > that
> > the kernel is able to probe this chip and load the driver needed for it.
> > The driver currently being loaded is the davinci_nand driver.  I have
> > managed to get this chip working with uBoot which uses a modified
> version
> > of
> > the MTD driver.
> >
> I found that some of the newer Micron nand chips don't store information
> about the chip layout in the id block anymore.  It's all been moved to the
> parameter page.  nand_get_flash_type(), in nand_base.c, relies on that
> data to correctly describe the chip layout, so you may need to hardcode
> the pagesize and eraseblock size in the nand_flash_ids table.
> 
> Take a look at the READ ID operation section in the micron datasheet to
> see if the relevant data is still exists, otherwise you need to hardcode
> those values.
> 
> Eric
> 
This device is probably a ONFI device. Thus the fourth ID byte might not be properly interpreted.

The best would be to just hard code the values in the device ids table