[PATCH v6 2/3] omap3 nand: cleanup virtual address usages
Charles Manning
manningc2 at actrix.gen.nz
Sun Dec 19 16:50:10 EST 2010
On Friday 09 July 2010 19:25:07 Sukumar Ghorai wrote:
> +++ b/arch/arm/plat-omap/include/plat/nand.h
> @@ -21,13 +21,11 @@ struct omap_nand_platform_data {
> int (*dev_ready)(struct omap_nand_platform_data *);
> int dma_channel;
> unsigned long phys_base;
> - void __iomem *gpmc_cs_baseaddr;
> - void __iomem *gpmc_baseaddr;
> int devsize;
> };
>
> -/* size (4 KiB) for IO mapping */
> -#define NAND_IO_SIZE SZ_4K
> +/* minimum size for IO mapping */
> +#define NAND_IO_SIZE 4
Is this really only for a 4-byte region? I would have expected that this
controls access to a multi-register NAND controller and should really be
larger.
-- Charles
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