[PATCH] pxa3xx_nand: fix time calculation

[Enrico Scholz]

Eric Miao <eric.y.miao at gmail.com> writes:

>>> Use DIV_ROUND_UP to calculate number of clocks.  Else, calculated clocks
>>> are nearly always to low and for times < 10ns, they will be negative on
>>> PXA320  (which has a nand clock of 104 MHz).
>>>
>>> -#define ns2cycle(ns, clk)    (int)(((ns) * (clk / 1000000) / 1000) - 1)
>>> +#define ns2cycle(ns, clk)    (int)(DIV_ROUND_UP((ns) * (clk / 1000000), 1000) - 1)
>>
>> Why there is -1 at the end?
> ...
> I'd recommend we remove this '-1' to always make the final result
> a little bit larger and avoid the negative case. DIV_ROUND_UP() is
> kind of confusing here, since the original equation is:
>
> cycles = ns / (1/clk * 10^9) = ns * clk / 10^9

Hi Eric,

for me, the DIV_ROUND_UP() is more clean, because 'ns' are minimum
values given on the datasheet and you have to round up fractional cycle
counts hence. But I agree that

| #define ns2cycle(ns, clk) (int)(DIV_ROUND_UP((ns) * (clk / 1000000), 1000) - 1)

and

| #define ns2cycle(ns, clk) (int)(((ns) * (clk / 1000000) / 1000))

give same results for most values.  I do not have a strong preference
for one of these two variants.


> Could you please verify that removing '-1' will solve all corner
> cases?

Except for overflows (which are uninteresting here), timings which are
a multiple of 1000ns are the only corner cases.  And these will result
into cycle counts which are increased by 1 compared to their ideal
value.



Enrico