MLC controller embedded in the NXP LPC32xx ARM CPU

[Gabriele Mondada]

Hi,

I'm starting to write the mtd driver for the MLC controller embedded in the NXP LPC32x0 ARM CPU. To prevent redoing existing code and to test my understanding, here are my "specs":

This controller has an hardware ECC. The ECC is performed on 512 bytes (user) + 6 bytes (oob) and produces 10 bytes code. The OOB data is covered by the ECC and cannot be handled separately from the user data. When using 2048 + 64 bytes pages (it's my case), the ECC must be performed 4 times. ECC codes will be inserted each 518 bytes, and not at the end of the page as usual.

The controller is described at page 158 of http://www.nxp.com/documents/user_manual/UM10326.pdf

The driver should not support OOB because it cannot do that in the standard mtd way. I can define the 6 bytes of OOB as part of the user data. This results in pages of 518 or 2072 bytes. Is there any problem with UBIFS or whatever else ?

For 2048 + 16 bytes pages, I plan to set ecc.steps=4, ecc.bytes=512, ecc.bytes=10 and mtd->oobsize=0 (maybe 40 ?) but I'm not sure that this combinaiton works (especially because mtd->oobsize=0). The ecc.calculate() method will read/write the discarded OOB bytes (6) and the ECC bytes (10). It also asks to the ECC hardware controller if data is correct and retrieves the corrected data if needed. The function ecc.correct() does nothing.

Do you think is the right way ? Any suggestion ?
Thanks a lot,
Gabriele