[PATCH v3 3/4] powerpc: NAND: FSL UPM: document new bindings
Wolfgang Grandegger
wg at grandegger.com
Thu Mar 26 12:35:32 EDT 2009
Grant Likely wrote:
> On Thu, Mar 26, 2009 at 9:33 AM, Wolfgang Grandegger <wg at grandegger.com> wrote:
>> Grant Likely wrote:
>>> Does using the reg property give the driver enough information to
>>> reliably program the MAR for NAND connections that use the address
>>> line chip select scheme? Related to that, should the binding include
>> In principle yes:
>>
>> if (i > 0)
>> offset[i] = resource[i].start - resource[0].start;
>
> Ewww. That's ugly.
Yep.
>>> a property that explicitly states that an address line chip select
>>> scheme is being used?
>> That's why I'm still in favor of:
>>
>> fsl,upm-multi-chip-offsets = <0x200 0x400>
>>
>> That would state that the address line chip select scheme is used with
>> the specified offsets. It also allows for a more elegant solution
>> (code-wise).
>
> Alright. Then at the very least the property name should reflect that
> address lines CS is used to reduce the chance of confusion with
> another multi-chip scheme. Something like
> fsl,upm-addr-line-cs-offsets maybe?
>
> Here is another thought. The binding is describing that address lines
> are used to activate CS lines. Offset for chip access purposes is
> derived from the address line, but it doesn't directly describe the
> hardware. The following may be a better description of the hardware.
>
> fsl,upm-addr-line-cs = <9 10>;
The TQM8548 hardware has some logic connected to the two address lines
allowing to select up to 4 chips with two address lines:
fsl,upm-addr-line-cs-offsets = <0x0 0x200 0x400 0x600>
That's the more general solution.
Wolfgang.
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