[PATCH v3 3/3] mtd-nand: DaVinci: Add 4-bit ECC support for large page NAND chips
Troy Kisky
troy.kisky at boundarydevices.com
Thu Jul 16 19:56:37 EDT 2009
nsnehaprabha at ti.com wrote:
> +/* An ECC layout for using 4-bit ECC with large-page (2048bytes) flash,
> + * storing ten ECC bytes plus the manufacturer's bad block marker byte,
> + * and not overlapping the default BBT markers.
> + */
> +static struct nand_ecclayout hwecc4_2048 __initconst = {
> + .eccbytes = 40,
> + .eccpos = {
> + /* at the end of spare sector */
> + 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
> + 34, 35, 36, 37, 38, 39, 40, 41, 42, 43,
> + 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
> + 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
> + },
> + .oobfree = {
> + /* 1 byte at offset 0 holds manufacturer badblock marker */
> + {.offset = 1, .length = 23, },
> + /* 5 bytes at offset 8 hold BBT markers */
> + /* 8 bytes at offset 16 hold JFFS2 clean markers */
> + },
> +};
I hate to sound like a broken record, but
If the bad block marker is only 1 byte. Don't you need to override
static struct nand_bbt_descr largepage_flashbased = {
.options = NAND_BBT_SCAN2NDPAGE,
.offs = 0,
.len = 2,
.pattern = scan_ff_pattern
};
I think it is easier just to leave it as 2 bytes. That may
allow substituting a different manufacturers chip too.
More information about the linux-mtd
mailing list