[PATCH 1/3] [MTD] [NAND] pxa3xx_nand.c: Fix typo that prevented non DMA aka polling mode from working correctly.

[Marcel Ziswiler]

Due to __raw_{read,write}sl() being 'long' size based the shift operations need
to divide the size in bytes by 4 which is achieved by ">> 2".

Acked-by: Eric Miao <eric.miao at marvell.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler at noser.com>
---
 drivers/mtd/nand/pxa3xx_nand.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index cc55cbc..dc1cc76 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -468,7 +468,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info)
 	switch (info->state) {
 	case STATE_PIO_WRITING:
 		__raw_writesl(info->mmio_base + NDDB, info->data_buff,
-				info->data_size << 2);
+				info->data_size >> 2);
 
 		enable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD);
 
@@ -480,7 +480,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info)
 		break;
 	case STATE_PIO_READING:
 		__raw_readsl(info->mmio_base + NDDB, info->data_buff,
-				info->data_size << 2);
+				info->data_size >> 2);
 		break;
 	default:
 		printk(KERN_ERR "%s: invalid state %d\n", __func__,
-- 
1.6.0.6