Bad blocks in MLC NAND

[Reuben Dowle]

As far as I can see, the NAND code is assuming that the bad block marker
is always in the first byte of the oob area in the FIRST page of each
block.

This is not true for MLC nand from most manufacturers. As far as I can
tell, only Micron actually place their bad block markers at this
location in MLC nand.

For other manufacturers, the bad block markers are being placed in the
first byte of the oob in the LAST page of a bad block. I have seen this
in the datasheets for NAND from Samsung (eg. K9G8G08UOA) or Numonyx (eg
NAND08GW3C2B).

So my question is - am I missing something, or are MLC nand chips from
these manufacturers not yet supported?

Reuben