[PATCH v4 3/3] mtd-nand: DaVinci: Add 4-bit ECC support for large page NAND chips
dedekind1 at gmail.com
Mon Aug 10 02:50:01 EDT 2009
On 08/07/2009 11:48 PM, nsnehaprabha at ti.com wrote:
> From: Sneha Narnakaje<nsnehaprabha at ti.com>
> This patch adds 4-bit ECC support for large page NAND chips using the new ECC
> mode NAND_ECC_HW_OOB_FIRST. The platform data from board-dm355-evm has been
> adjusted to use this mode.
> The patches have been verified on DM355 device with 2K Micron devices using
> mtd-tests and JFFS2. Error correction upto 4-bits has also been verified using
> nandwrite/nanddump utilities.
> This patch series applies to linux-mtd next (mmotm) GIT tree.
> This version (v4) addresses the review comment to leave 2 bytes at offset 0
> for NAND manufacturer badblock markers.
> Reviewed-by: David Brownell<dbrownell at users.sourceforge.net>
> Signed-off-by: Sneha Narnakaje<nsnehaprabha at ti.com>
> Signed-off-by: Sandeep Paulraj<s-paulraj at ti.com>
There are already 3 patches in my l2-mtd-2.6.git tree:
Please, verify them and let me know if they are OK or I should drop
them and take other patches.
Artem Bityutskiy (Артём Битюцкий)
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