[PATCH] Onenand Reset IOBE bit in SYS_CFG register in onenand_release

[Gaurav Singh]

Hi,

> Interesting, share interrupt pin between OneNAND and NAND.
> Do you check the performance gain from interrupt use?
> Even though there's code to use interrupt wait, in my board, there's
> no performance gain.
I think that the interrupt mode will help when there is high load on
the CPU. Will run tests in interrupt and polling mode in two
scenarios. 1. Copy of a large file to ONENAND with no CPU load. 2.
Copy of a Large file to ONENAND with an infinite loop running in the
background - this generates CPU load. Little bit busy today but will
run it and mail the results by tomorrow. In my opinion Scenario 2
should give better results in interrupt mode.

> Anyway follow patch fix your problem, I'm okay to apply.
> except one code style issue. please place curly brace '{' after if statement
>

Thanks a lot! Resending the patch:

diff --git a/drivers/mtd/onenand/onenand_base.c
b/drivers/mtd/onenand/onenand_base.c
index 0e168d8..9b2f9aa 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -2728,6 +2728,13 @@ void onenand_release(struct mtd_info *mtd)
        /* Deregister partitions */
        del_mtd_partitions (mtd);
 #endif
+       /* Reset the IOBE bit in SYS_CFG Register */
+        if ( this->wait == onenand_interrupt_wait ) {
+               int syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
+               syscfg &= ~ONENAND_SYS_CFG1_IOBE;
+               this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
+       }
        /* Deregister the device */
        del_mtd_device (mtd);


Regards
Gaurav Singh