[PATCHv2] powerpc: Describe memory-mapped RAM&ROM chips OF bindings
Laurent Pinchart
laurentp at cse-semaphore.com
Mon Mar 31 12:39:10 EDT 2008
Signed-off-by: Laurent Pinchart <laurentp at cse-semaphore.com>
---
Documentation/powerpc/booting-without-of.txt | 13 ++++++++++++-
1 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 7b4e8a7..3e1963b 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -57,7 +57,8 @@ Table of Contents
n) 4xx/Axon EMAC ethernet nodes
o) Xilinx IP cores
p) Freescale Synchronous Serial Interface
- q) USB EHCI controllers
+ q) USB EHCI controllers
+ r) Memory-mapped RAM & ROM
VII - Specifying interrupt information for devices
1) interrupts property
@@ -2816,6 +2817,16 @@ platforms are moved over to use the flattened-device-tree model.
big-endian;
};
+ r) Memory-mapped RAM & ROM
+
+ Dedicated RAM and ROM chips are often used as storage for temporary or
+ permanent data in embedded devices. Possible usage include non-volatile
+ storage in battery-backed SRAM, semi-permanent storage in dedicated SRAM
+ to preserve data accross reboots and firmware storage in dedicated ROM.
+
+ - name : should be either "ram" or "rom"
+ - reg : Address range of the RAM/ROM chip
+
More devices will be defined as this spec matures.
--
1.5.0
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussée de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
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