BCH for NAND ECC

Andrew E. Mileski andrewm at isoar.ca
Tue Jun 3 18:50:10 EDT 2008

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Is anyone looking at BCH for NAND ECC?  If so, I'll let the experts have
at it.

Otherwise...

I can't really find any examples for NAND usage, and am inching my way
through the theory.

Am I correct in that BCH(2096, 2048, 9) would do for 4 correctable
errors in a 256 byte block?  Assuming I understand any of it, that would
be 6 bytes of ECC per block.

--
Andrew E. Mileski

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