Does UBI support MLC nand flash?

[Kyungmin Park]

Hi,

I think it can support MLC NAND in the code.
The big differences between the SLC and MLC are NOP (or subpage) and POR handling.

Generally SLC has NOP 4 (old chips have 8) whereas MLC has NOP 1.
In NAND code, it handles with NAND_NO_SUBPAGE_WRITE and NAND_CI_CELLTYPE_MSK.
Umm, who uses the NAND_NO_SUBPAGE_WRITE in code?
Anyway it maybe checks it with the CELLTYPE from 3rd ID data.

And sequential write is also only permitted at large page SLC NAND. It means it's working well on MLC NAND in current UBI code. If
not, it also doesn't work at SLC NAND.

Thank you,
Kyungmin Park

-----Original Message-----
From: linux-mtd-bounces at lists.infradead.org [mailto:linux-mtd-bounces at lists.infradead.org] On Behalf Of Nancy
Sent: Wednesday, January 02, 2008 10:42 AM
To: linux-mtd at lists.infradead.org
Subject: Does UBI support MLC nand flash?

Sir / Madam,

             Does UBI support MLC nand flash?

             According to the MLC nand spec, It is only allowed write
once per erased
block, moreover, it isn't allowed ramdom write during a block, means
the page number must be increase during the write PED operation.


--
Best Regards,
Nancy

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/