jffs2 32-bit access issue

Josh Boyer jwboyer at gmail.com
Fri Dec 26 09:06:31 EST 2008


On Fri, Dec 26, 2008 at 08:36:45AM -0500, ARXX Dev Team wrote:
>Our board has a PowerPC core inside Xilinx Virtex II Pro FPGA. We have
>a Intel Strataflash attached to the FPGA accessed via a 16-bit
>interface. Since our interface to the flash part is 16-bit wide and we
>do not have any chip selects or other mechanisms to prevent 32-bit
>accesses to the part, some of the jffs2 scanning/erasing code fails.
>Hence we had to create the patch below to use MTD layer functions (or
>simple 8/16 bit access code) to correctly access the part instead of
>original jffs2 code that was accessing the flash directly 32-bit wide.
>We are would like your opinion as well as find out if this fix (in
>some form) needs to go back into jffs2 code for parts that cannot be
>accessed 32-bit wide (or need to prevent 32-bit accesses).
>we sincerely appreciate your help,

Why don't you write a custom mapping driver that prevents the 32-bit
accesses at the MTD level?  That seems like a more appropriate place
than sticking it in JFFS2 code, which is supposed to be fairly
hardware independent (with the obvious exception of major flash class
types like NOR, NAND, etc).

josh



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