[PATCH] NAND hardware ECC controller on at91sam9263 / at91sam9260

[Richard Genoud]

2008/4/24, David Brownell <david-b at pacbell.net>:
> My copy of the sam9263 docs doesn't list an "ECC_PARITY" field
>  in the PR register ... just two masked fields, 0xfff0 and 0x000f
>  labeled WORDADDR and BITADDR respectively.  (Which evidently are
>  combined into a single opague 0xffff mask on block writes, and
>  are interpretable only on block reads.)
>
>  And the system header doesn't have an ECC_PARITY mask ... so I
>  get build errors with current GIT.
>
>  - Dave
>

you're right, this is my bad. Thanks for pointing this out.

David W., could you apply the patch bellow to make things right again ?

The AT91_ECC_PARITY mask does not exist (and masking with it was useless).
kernel version : mtd-2.6 current git
Signed-off-by: Richard Genoud <richard.genoud at gmail.com>
---
--- drivers/mtd/nand/at91_nand.c.orig
+++ drivers/mtd/nand/at91_nand.c
@@ -199,7 +199,7 @@ static int at91_nand_calculate(struct mt
 	unsigned int ecc_value;

 	/* get the first 2 ECC bytes */
-	ecc_value = ecc_readl(host->ecc, PR) & AT91_ECC_PARITY;
+	ecc_value = ecc_readl(host->ecc, PR);

 	ecc_code[eccpos[0]] = ecc_value & 0xFF;
 	ecc_code[eccpos[1]] = (ecc_value >> 8) & 0xFF;