Very slow nor flash write

[Anders Grafström]

tike64 wrote:
> Of course the code must always allow for possible timeouts.But wouldn't the
> cfi_cmdset_0001.c code take care of that:
>
>         if (!timeo) {
>             map_write(map, CMD(0x70), cmd_adr);
>             chip->state = FL_STATUS;
>             return -ETIME;

This is where the state is lost. chip->state is changed to FL_STATUS
but the hardware remains in FL_ERASING or FL_WRITING state until it
completes the operation or times out after the max erase or write time.

What then happens is get_chip() timing out saying
"Waiting for chip to be ready timed out. Status xxxx"
and jffs2 complaining about not being able to read or write.
But this is probably only an issue for erase operations.

For me this resulted in failure to read the file system at boot time
and thus a system that could not be booted.

I guess there is something wrong with the timeout error path.
Should chip->state be left unchanged?

> I think I understand the principle of the patch and it seems fine to me. But
> it seems to solve the problem only for the CFI parts. I think there should be
> respective timing fields in the jedec_table in jedec_probe.c.

Yes, it only solves it for parts that have timing values specified. There is
more to do. Quick version could be to set the timeouts to the old defaults and
the write and erase time to short values.