MLC NAND support in JFFS2
Charles Manning
manningc2 at actrix.gen.nz
Tue May 8 17:38:45 EDT 2007
On Tuesday 08 May 2007 20:48, Artem Bityutskiy wrote:
> On Tue, 2007-05-08 at 16:32 +0800, Stanley Cai wrote:
> > hi
> > I find that some vendor's MLC NAND such as Samsung require the user
> > programs the pages in the same block in sequence from least
> > significant page to most significant page. i think current JFSS2 can
> > not do this now.
>
> Please, no private mails.
>
> This was a requirement for SLC flashes as well, at least Toshiba's data
> sheets noted this. JFFS2 satisfies this requirement.
I think the bigger issue is supporting multi-bit error correction via BCH. The
current 1-bit correcting Hamming code is inadequate for MLC.
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