PAGE READ CACHE MODE anyone?

[Alexander Belyakov]

Hello!

As you may know some NAND chips have PAGE READ CACHE MODE operation
that uses the cache register to read data. The basic idea is as
follows, a page of data is transferred from the Flash array to the
data register, then moved to the cache register when the PAGE READ
CACHE MODE command is issued. After this command is issued, data can
be clocked out of the cache register through the NAND Flash interface,
while the next page of data is simultaneously moved from the Flash
array to the data register.

So _theoretically_ using PAGE READ CACHE MODE could save more than 30%
of time to read each page. Pages must be sequentially read one by one
without interruption. The more pages read sequentially, the more read
performance improvement is (with saturation, of course).

My question is, what is the reason of this feature is still not
supported by Linux MTD? Just no one has sent a patch? Or there are
some special software limitations? Or I'm just missing something?

Thanks,
Alexander