Strange NAND scan problem

[z l]

We have a custom board using Cirrus Logic EP93XX
processor.  The NAND flash data bus is connected to
the SRAM bus and using GPIO line for device control. 
If compiled with ARM native gcc-3.4 compiler,
everything works great.  But if compiled with ARM
native gcc-4.1 compiler, it works fine when there IS a
NAND flash chip.  But the nand_scan will report bogus
NAND chip when there IS NO NAND chip in the system and
proceed to scan the bad blocks which it finds plenty. 
First thought is that maybe the SRAM bus was in high Z
and it will read back what ever it was written to the
previous instruction.  But would versions of compiler
make a difference as what would be read back?