[PATCH/RFC] MTD: Striping layer core
Alexander Belyakov
alexander.belyakov at intel.com
Thu Mar 30 10:38:47 EST 2006
Hi Artem,
Artem B. Bityutskiy wrote:
>> But due to some properties of interleaving algorithm it is very likely
>> get increased erase size in case of striping thre ore more devices with
>> different size.
> Brrr... The resulting eraseblock size is anyway increased. I guess you
> wanted to say that one may end up with *substantially* increased
> eraseblock size, right?
Yes, you're right.
> So, to be generic, we have to say that the interleave size has to be
> multiple to the minimal flash input/output unit size.
Thanks for your clarification!
Alexander Belyakov
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