NAND OOB Questions...

[Steve Finney]

I have 3 questions about OOB and NAND chips that I'm
hoping someone can answer. Per an earlier post, I think
there may be two (obscure?) bugs in nand_base.c, but
there's too much I don't know about NAND (and the code) to be sure.
I believe the following description applies to the most recent
stable kernel source (2.6.16.19).

1) The Samsung K9F56* NAND chip allows doing more than one write
to the OOB area of a page without an erase; the second write
may zero bits that were set to 1 by the first write. Is the Samsung
chip unusual in this, or is this normal NAND behavior? (I believe
this would be normal for NOR flash).

2) In nand_base.c:nand_write_page(), OOB data is written even when
NAND_ECC_NONE is set. Under what circumstances is this useful?
(The issue with this is that, in conjunction with (1), this may
overwrite OOB in a circumstance where you're trying to write it
yourself from user space; pernaps this is something that's only relevant
for diagnostics/debugging).

3) nand_prepare_oobbuf() makes a point of setting the internal oobbuf
to 0xFF if it's had ECC bytes written to it (based on the this->oobdirty
flag). However, the default case (which includes hardware ECC) in
nand_write_page() can write the internal oobbuf without setting
this->oobdirty, and thus not triggering the later reset to 0xFF. Is
there a rationale for this? (The OOB issue induced by 1 & 2 would be
benign if oobbuf was cleared to 0xFF).

Thanks for any info.
sf