about using UBI on MLC Nand flash

[Marteo Tim]

2006/7/28, Artem B. Bityutskiy <dedekind at yandex.ru>:
> Hello Tim,
>
> Marteo Tim wrote:
> > I noticed that UBI need to write 2 times at 1st page in 1 block, one
> > for EC header, and the other for VID header. But it is not suitable
> > for MLC NAND flash, which only can write once per page. And by
> > default, MTD's nand_write can only write page-aligned data.
> > Although we can set the module parameter vid_hdr_offsets to the 2nd
> > page, but it will occupy more flash space. It is in a dilemma. :(
>
> I wonder, what's your flash What's the NAND page size of your flash?
>

My NAND flash page size is 2k byte.

> unfortunately, I failed to find any MLC NAND flash manual to read about
> it. If you could send me one, I'd be grateful. Or URL? Is it only
> Toshiba who produce them?
>

OK, I'm glad to send it to you, include SAMSUNG&TOSHIBA's MLC NAND
flash datasheet, please check your email, :)

> Is this a feature of MLC NANDs or this is just MTD which does not
> support multiple writes? For example, Samsung SLC flashes *do* support 4
> writes per NAND page, but MTD *does not* support this so far (but there
> is a plan to implement this).
>

By now, as the datasheet described, MLC NAND flash cannot write exceed
one time for main area and one time for spare area. I don't know it is
due to manufacture technology's limit or other reasons.

> And it is strange if UBI tries to write to one NAND page twice at your
> case. By default it should not, granted mtd->writesize is correct in
> your case.
>

Yes, for SLC NAND flash, it would be easy to write more times per page
by setting mtd->writesize to 512.

Due to cheap price, MLC NAND flash maybe use more and more popular,
especially in bulky flash. Yaffs2 can already support MLC chips by
zero page rewrites, and I want UBI can support it too. :)