[Yaffs] bit error rates --> a vendor speaks

Thomas Gleixner tglx at linutronix.de
Sun Feb 19 03:29:05 EST 2006

On Sat, 2006-02-18 at 10:11 -0800, Russ Dill wrote:
> > Some words about Reed Solomon.
> >
> > Reed Solomon needs hardware support for performance reasons. Efficient
> > usage of Reed Solomon requires a different Data / RS-code layout:
> At what level is hardware support required? I'm involved in the design
> of a new system with a 466Mhz 80200. Should fpga considerations be
> mode for ecc correction? What sort of logic would be best to put in
> the fpga?

Depends. The 1bit correction/ 2bit detection Hamming ECC algorithm found
in the kernel is not too bad, but Reed Solomon is a quite conmputation
expensive algorithm. Look into the encoder / decoder code in

In general you have to iterate over the data buffer and compute on each
step. The performance penalty depends on the complexitiy of the
algortihm. If you have enough space in your FPGA then its definitely a
good idea to put some ECC calculation mechanism into it. There are
implementations for both ECC and Reed Solomon available.


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