NAND/ HW ECC problem

[Vitaly Wool]

Greetings,

we're currently working on NAND flash driver implementation for a new 
ARM926-based board. The flash controller is SanDisk's MLC, and the the 
requirement is to use hardware ECC capabilities provided by this controller.

We've come across several hardships with generic MTD NAND stuff carrying 
out this task.

First, it turned to be necessary to add one more ECC type 
(NAND_ECC_HW10_512): this controller stores 10 ECC data bytes after each 
512-byte block. Also the need to change size of eccpos array off of 
nand_oobinfo structure arose: for flashes with 2K-sector, this turned to 
be 40 bytes for each sector.

The serious problem we came across also was that nand_write_page doesn't 
follow the free bytes reference for OOB to write ECC data what was 
obviously wrong. As far as I understand, the DoC flashes have specific 
mechanism for handling that, so he legacy variant was left for the DoC, 
dunno whether it's right.

Attached is the patch suggested to fix the problems described.

Best regards,
   Vitaly


-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: nand-ecc.patch
Url: http://lists.infradead.org/pipermail/linux-mtd/attachments/20050919/7b2cfe4f/attachment.pl