[PATCH] NAND: AMD Au1550 driver reads write only register

Sergei Shtylylov sshtylyov at ru.mvista.com
Sat Oct 29 14:35:27 EDT 2005


       I have noticed that during the last commit to AMD Au1550 NAND driver the
old buglet was reintroduced: as MEM_STNDCTL register is write only, and
seem to always read as 0x31, read-modify-write of it in au1xxx_nand_init()
will cause undesirable effect of enabling -RCS0/1 pin override (bits 4/5 of
this reg.), thus possibly causing a contention on the static bus when the NOR
flash (which uses  -RCS0) or board control status regs. (using -RCS2) are
read. Luckily, this now goes away with a first NAND access, since
au1550_hwcontrol() doesn't try to read this register before writing anymore.
      There's another issue with that though -- to be addressed by the next

WBR, Sergei

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