XIP & GCC optimization & halting

Nicolas Pitre nico at cam.org
Wed Oct 19 13:03:05 EDT 2005

On Wed, 19 Oct 2005, Vitaly Wool wrote:

> Hi,
> >  
> > > Now I'm not clear about solution for the problem.
> > >    
> > 
> > Select only one CFI buswidth and only one chip interleave when configuring
> > your kernel.  That will allow gcc to precompute everything a t compile time
> > and avoid the runtime divide.
> >  
> Does it make sense to lock runtime divide functions in i-cache during flash
> not being in linear mode?


That _could_ be done of course.  But that is a completely non generic 
(non portable) solution adding yet more complexity and dependencies to a 
setup which is already fragile.  Better aim for more simplicity instead 
which is to make the XIP-off code paths as short, simple and verifiable 
as possible.  Going with a single buswidth and chip interval should 
achieve that.


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