CRC on Read-Only partition

[Jared Hulbert]

> The question is: if we've read page and encounter ECC error, is it
> possible that if we re-read it several times we will have no errors? This
> means does NAND technology assume random occasional bit flips which go
> away after we re-read page?

Whether or not the error goes away was not the point.  My point is
that with NAND you can get errors even with RO data.  That's all.
 
> P.S. :
> Toshiba's guide stands bit flipping is possible, but they stay until block
> is erased. Re-read as many times as yiu want - you will still have this
> bit error. But this doesn't mean block is bad - erase the block and be
> happy.

I think the real question is whether the likelyhood of errors getting
past the NAND's ECC is > or < than the users tolerance level.  I don't
believe that the answer should be terribly different for RO or RW
data.  Yet this depends on temperature, frequency of read, and yes
even solar flares :)  Therefore the answer is different for a set top
box with an expected useful life of 2 years and a car.