additional error checks for AG-AND erase/write

[Thomas Gleixner]

On Tue, 2005-01-18 at 09:43 -0600, David A. Marlin wrote:
> The Renesas AG-AND chips support additional error checking on erase and
> write operations beyond just checking the operation status.  I think the
> logic is that since ECC can correct 2-bit errors on read, if only a
> single bit error occurs on and erase or write the operation should not
> be considered FAIL.  Even if a single bit error occurs on read (in
> addition to the single bit error on write), it will still be corrected
> and no data will be lost.

Hmm, have you other information ?

>From the data sheet:
 
When an error occurs in program page, block replacement including
corresponding page should be done. 
...
When an error occurs in erase operation, future access to this bad block
is prohibited. 

An error on erase is definitely a criteria for putting the block on the
bad list. Actually JFFS2 tries to erase it again before sorting it out.

The single bit programming error does not make a lot of sense to me, as
you always have to do RS error correction when you read the page, which
results in a nice performance penalty. And its a clear sign that
something went wrong. We try to reuse the block, see above.

tglx