joern at wohnheim.fh-wedel.de
Fri Oct 10 13:50:41 EDT 2003
On Fri, 10 October 2003 06:46:21 +0100, David Woodhouse wrote:
> Partly because I'm unconvinced that we want to actually _use_ such a
> small erasesize. It means you split far more page writes into two nodes
> to avoid crossing block boundaries, and hence waste space.
> I suspect the main reason Thomas objected to my original 'min 64KiB' was
> because of the 5-erase-block threshold. Since I've just wound that
> threshold _up_ on NAND because and it's also based in part on nr_blocks
> now, we could perhaps rethink the minimum erasesize. I didn't manage to
> tie him down on #mtd yesterday though.
But this is wrong (TM). You missed at least one variable in your
equation. Five erase blocks is quite enough for NAND, as long as you
don't have more blocks total than on a similar NOR device. The
problems start when you have too many blocks - you need more free
This means that you need what I tried to start with one - dynamic 1)
numbers of erase blocks and possibly dynamic block sizes as well.
Anything else may be a decent assumption for one device or another,
but not for all.
1) dynamic for compile time - it should stay static for any given
Fancy algorithms are buggier than simple ones, and they're much harder
to implement. Use simple algorithms as well as simple data structures.
-- Rob Pike
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