Intel Strataflash
David Woodhouse
dwmw2 at infradead.org
Wed Jan 29 17:36:13 EST 2003
On Wed, 29 Jan 2003, Stephane List wrote:
> PS : I couldn't compile my kernel with the CVS code...
Details?
> CONFIG_MTD_CFI_ADV_OPTIONS=y
Advanced options? Why did you enable this? On this occasion it isn't the
problem, because you got the options it hides correct anyway.
> #Because the data bus of the CPU is 4 bytes
> CONFIG_MTD_CFI_B4=y
Correct.
> #Because There are 2 flashs connected on the same Data bus.
> CONFIG_MTD_CFI_I2=y
Correct.
> #Because it's an Intel Strataflash
> CONFIG_MTD_CFI_INTELEXT=m
Correct.
> #Because my flash chip data bus is 2 bytes width
> CONFIG_MTD_PHYSMAP_BUSWIDTH=2
No, your CPU data bus is 4 bytes width (cf. CFI_B4 above) and has two
chips on it so
CONFIG_MTD_PHYSMAP_BUSWIDTH=4
--
dwmw2
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