Fw: corrupt my NAND flash device
manningc2 at actrix.gen.nz
Tue Apr 29 15:37:25 EDT 2003
> > Why do you interrupt erases? It seems to me like potentially an unhealthy
> > thing to do on NAND since NAND does not support erase suspend. NAND
> > erases quite quickly (say 2mS) so do you gain anything real by doing
> > this?
> I have tested this with both chiptypes. The erase is aborted and restarted
> by the erase function.
A couple of comments:
* "Both chip types" is misleading. There is not just a Toshiba and a Samsung
chiptype. Each of these vendors provides chips with different internal
architectures. That is one of the reason characteristics like the number of
partial page writes etc change.
* "Aborted and restarted" is perhaps incorrect. Don't you really mean
"aborted and re-performed"? I do not believe these parts have a way of
remembering their internal eraseure state to restart line NOR parts do.
My other question remains: do you really gain anything by adding the erase
interruption feature? From a Samsung datasheet:
* Block erase takes typically 2ms, max 3ms.
* If you do a reset while the part is erasing, the reset might take as long
You then have to restart the erase for it to take another 2ms (unless it gets
This certainly adds some unpredictability to the behaviour. Most likely it
does all work, but is it worth it?
> It would really be interresting, if those problems are in related to an
> erase abort. Can anybody insert some debugging in nand_get_chip, where the
> abort is done?
Yes, it certianly would be interesting.
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