Flash left in a write mode

[Arne Jonsson]

Hi!

Another problem is when you have your interrupt vectors stored
in the flash you are accessing.
If you get an interrupt and have unlocked the flash your interrupt
vectors are not seen by the CPU, and off you go into the deep binary
space.
I had to disable interrupts at all times when the flash was "unlocked".
Maybe this is something that we could have a switch/define for ?
Putting the boot address and hard interrupt vectors in the same address
range
is IMHO _very_ bad chip design.
Another approach would be to have external hardware for the boot vector,
switching to the flash and have RAM at the address of the interrupt
vectors, but the extra HW is an extra cost.

Best regards,
/Arne Jonsson

-- 
Arne Jonsson
i3 micro technology AB
Phone:+46-8-506 388 00
Fax:  +46-8-506 388 75