Cache mappings and invalidate

[Joakim Tjernlund]

Hi again

There is a bug somewhere in this, I get CRC error when I copy a file 
a few times, then rm all copies of the file and reboot. When the board
comes up again I see these CRC errors. Any ideas?
  
          Jocke
> 
> Hi all
> 
> I am trying to make copy_from use cached memory by assigning 
> map_priv_2 = (unsigned long)__ioremap(flash_addr, flash_size, 0);
> and then change copy_from routine to:
> +#ifndef NO_CACHE
> +       memcpy_fromio(to, (void *)(map->map_priv_2 + from), len);
> +#else
>         memcpy_fromio(to, (void *)(map->map_priv_1 + from), len);
> +#endif
> 
> There are no cache invalidations in my map file, instead I have 
> added invalidate_dcache_range() calls to drivers/mtd/chips/cfi_cmdset_0001.c(see below)
> in do_write_oneword(), do_write_buffer() and do_erase_oneblock(). Note that
> this is just a quick hack to try out my theory. Does this look sane or should I use
> another invalidate_dcache_range() and/or place the invalidate calls somewhere else?
> 
> I am not using burst reads yet, that will come later once i have gotten the cached mapping
> to work.
>  
>        Joakim
> 
> 
> 
> --- drivers/mtd/chips/cfi_cmdset_0001.c 2001/10/25 12:11:10     1.3
> +++ drivers/mtd/chips/cfi_cmdset_0001.c 2001/11/12 12:02:33
> @@ -502,6 +502,10 @@
>         cfi_udelay(chip->word_write_time);
>         spin_lock_bh(chip->mutex);
> 
> +#ifndef NO_CACHE
> +       invalidate_dcache_range(map->map_priv_2 + adr, map->map_priv_2 + adr + 4); /* on a 32 bit bus */
> +#endif
> +
>         timeo = jiffies + (HZ/2);
>         z = 0;
>         for (;;) {
> @@ -691,7 +695,7 @@
>         wbufsize = CFIDEV_INTERLEAVE << cfi->cfiq->MaxBufWriteSize;
>         adr += chip->start;
>         cmd_adr = adr & ~(wbufsize-1);
> -
> +
>         /* Let's determine this according to the interleave only once */
>         status_OK = CMD(0x80);
>  
> @@ -790,6 +794,10 @@
>         cfi_udelay(chip->buffer_write_time);
>         spin_lock_bh(chip->mutex);
>  
> +#ifndef NO_CACHE
> +       invalidate_dcache_range(map->map_priv_2 + adr, map->map_priv_2 + adr + len);
> +#endif
> +
>         timeo = jiffies + (HZ/2);
>         z = 0;
>         for (;;) {
> @@ -994,6 +1002,10 @@
>         spin_unlock_bh(chip->mutex);
>         schedule_timeout(HZ);
>         spin_lock_bh(chip->mutex);
> +
> +#ifndef NO_CACHE
> +       invalidate_dcache_range(map->map_priv_2 + adr, map->map_priv_2 + adr + 0x40000);
> /* 0x40000 is my erase size */
> +#endif
>  
>         /* FIXME. Use a timer to check this, and return immediately. */
>         /* Once the state machine's known to be working I'll do that */
> 
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